[MN-dev] [mndiff]: r71 - trunk/vga600/vga600.asm
michael
subversion at mplayerhq.hu
Fri Jul 6 00:55:01 CEST 2007
Author: michael
Date: Fri Jul 6 00:55:01 2007
New Revision: 71
Log:
version from 1997-02-18 01:41
Modified:
trunk/vga600/vga600.asm
Modified: trunk/vga600/vga600.asm
==============================================================================
--- trunk/vga600/vga600.asm (original)
+++ trunk/vga600/vga600.asm Fri Jul 6 00:55:01 2007
@@ -1,6 +1,6 @@
-;350 text ???VDEE =57h
+;350 text ???VDE =57h
-;VGA600 ver 0.5 Copyright (C) Michael Niedermayer 1997
+;VGA600 ver 0.6 Beta Copyright (C) Michael Niedermayer 1997
;history:
; 0.1 initial ver (never released)
@@ -23,153 +23,310 @@ SC_INDEX equ 03c4h
CRTC_INDEX equ 03d4h
MISC_OUTPUT equ 03c2h
MISC_INPUT equ 03cch
+Attrib_INDEX equ 03c0h
+Grafix_INDEX equ 03ceh
patch_size equ patch_code_end-patch_code
delay equ 6
delay2 equ 12
+FPx equ 12
+FPx_1 equ 1 shl FPx
segment code
org 100h
assume cs:code, ds:code, es:code, ss:code
start:
-jmp install
+jmp install ;jmp to install code
-mcb_name db 'VGA600 '
+mcb_name db 'VGA600 ' ;ends up in mcb if it works
int10h:
- cmp ax,020FFh
+ cmp ax,020FFh ;check for allredy installed call
jne exit_10
mov ax,00600h
- mov bx,cs
- iret
+ mov bx,cs ;bx=cs of TSR
+ iret ;get out
exit_10:
push ax
- cmp ax,04F02h
+ cmp ax,04F02h ;check for VESA ModeSet
je mode_set
- test ah,ah
- jnz no_mode_set ;only mode set
+ test ah,ah ;check for Standart ModeSet
+ jnz no_mode_set ;only mode set
and al,7Fh
- cmp al,013h
- je x_mode_set ;only 320x200 (x-modes)
+ cmp al,013h ;check for 320x200x256
+ je x_mode_set ;only 320x200 (x-modes)
mode_set:
- mov [BYTE cs:temp-int10h],1
+ mov [BYTE cs:temp-int10h],1 ;set call_CheckSet_flag
x_mode_set:
- mov [BYTE cs:counter-int10h],delay or 11000000b
+ mov [BYTE cs:counter-int10h],delay or 11000000b ;set delay but disable int 8
no_mode_set:
pop ax
- pushf
+ pushf ;call orginal int 10h
db 09Ah
old_int10h dd 0
pushf
- shr [BYTE cs:temp-int10h],1
- jnc no_check_set
- call check_set
-no_check_set:
- and [BYTE cs:counter-int10h],00111111b
+ shr [BYTE cs:temp-int10h],1 ;check call_CheckSet_flag
+ jnc no_CheckSet
+ call CheckSet
+no_CheckSet:
+ and [BYTE cs:counter-int10h],00111111b ;reaktivate int 8
popf
retf 2
int8h:
- dec [BYTE cs:counter-int10h]
- jns decr
- inc [BYTE cs:counter-int10h]
-decr:
- jnz exit_8
- mov [BYTE cs:counter-int10h],delay2
+ dec [BYTE cs:counter-int10h] ;dec counter
+ jns decr
+ inc [BYTE cs:counter-int10h] ;inc counter if negative
+decr: ;if(X>0) X1=X-1 if(X<1) X1=X if(X=8000h) X1=7FFFh
+ jnz exit_8 ;get out if not zero
+ mov [BYTE cs:counter-int10h],delay2 ;set new counter
- call check_set
+; call CheckSet
-exit_8:
+exit_8: ;jmp to old int 8
db 0eah
old_int8h dd 0
-check_set:
+CheckSet:
+int 3
pusha
push ds
+push es
push cs
pop ds
- mov dx,CRTC_INDEX
- mov al,9
+ push cs
+ pop es
+ cld
+
+ mov si,offset(where)-offset(int10h) ;Read and convert Vga-Regs
+ mov di,offset(what)-offset(int10h)
+ mov bx,offset(OF2Real_code)-offset(int10h)
+
+ mov dx,SC_INDEX
+ mov al,1
out dx,al
inc dx
- in al,dx
- dec dx
- and al,11100111b ;TEXT (25/50)
- mov cl,al
- jns no_cga
- mov ah,al
- add al,al ;shl al,1
- inc ax
- and ax,0110000000011111b
- or al,ah
-no_cga:
- xchg ax,bx ;bl=al
- mov al,12h
+ in al,dx ;get SCM
+ stosb ;save SCM
+ mov cx,9
+ test al,1
+ jz chr_9
+ dec cx
+chr_9:
+ xchg ax,cx
+ stosw ;save chr_clock
+
+ mov dl,low(Grafix_INDEX) ;dh=3!
+ mov al,6
out dx,al
inc dx
+ in al,dx ;get GM
+ stosb ;save Grafix Misc(text/grafix)
+
+ mov dl,low(MISC_INPUT) ;dh=3!
in al,dx
- dec dx
- mov bh,al
- mov ch,al
+ stosb ;save Misc-reg
- cld
- mov si,offset(CRTParms)-int10h-9
-check_loop:
- add si,9
- lodsw
+get_regs:
+ mov dl,low(CRTC_INDEX) ;!dh=3
+ lodsb ;read index from table1
+ test al,al ;check for sign bit
+ js end_get_regs ;get out is set
+ out dx,al ;set index
+ inc dx ;dx= data_port
+ in al,dx ;get data
+ push ax ;save date
+ lodsw ;get jmp_table_entry and inc si
+ cbw ;convert it to word
+ add bx,ax ;and add it to the last one
+ pop ax ;restore data
+ mov cl,1 ;cl=1 (needed for some codes)
+ mov ah,0
+ call bx ;call it
+ stosw ;!ah=0 /write data to table2
+jmp get_regs
+end_get_regs:
+
+ mov ax,[HT-int10h] ;check horizontal coherenzy
+ cmp ax,[FP8_1-int10h] ;check HT<256 (causes div error)
+ jnb Not2_End_CheckSet
+End2_Checkset:
+ jmp End_CheckSet
+Not2_End_CheckSet:
+ mov bx,[HBS-int10h]
cmp ax,bx
- je patch
- test ax,ax
-jnz check_loop
+ jb End2_Checkset
+ mov bx,[HSS-int10h]
+ cmp ax,bx
+ jb End2_CheckSet
+ mov ax,[HDE-int10h]
+ cmp bx,ax
+ jb End2_CheckSet
+
+ mov ax,[VT-int10h] ;check vertical coherenzy
+ mov bx,[VBS-int10h]
+ cmp ax,bx
+ jb End2_CheckSet
+ mov bx,[VSS-int10h]
+ cmp ax,bx
+ jb End2_CheckSet
+ mov ax,[VDE-int10h]
+ cmp bx,ax
+ jb End2_CheckSet
- mov si,offset(TextParms)-int10h-7
-check_loop2:
- add si,9
- lodsw
- cmp ax,cx
-nopi:
- je patch2
- test ax,ax
-jnz check_loop2
-pop ds
-popa
+ cmp ax,[max_line-int10h] ;check num_lines (300-1000)
+ ja End2_CheckSet
+ cmp ax,[min_line-int10h]
+ jb End2_CheckSet
+
+ mov al,[MSL-int10h]
+ mov bl,10011111b
+ test [BYTE gm-int10h],1 ;test if text
+ jnz no_text
+ mov bl,10000000b
+no_text:
+ and al,bl
+ jns no_cgax2 ;test if cga like mode
+ mov al,1
+no_cgax2:
+ and al,00011111b
+ inc ax
+ cbw
+ stosb ;save lm
+
+ mov bx,[VDE-int10h] ;get phys-lines
+ xchg ax,bx ;ax=phys-line / bx=line_mult
+ cwd
+ div bx ;find logical_lines
+ stosw ;save ll
+ xchg ax,di ;di=logi-line / bx=line_mult
+ mov cx,-1 ;cx=-1 (best_clock_index)
+
+FindBest:
+ inc bx ; inc line_mult
+ js End_FindBest ; just in case VDE is very strange
+ cmp bl,3 ;check line_mult<3
+ jb n3
+ test [BYTE gm-int10h],1 ;test if text
+ jz End_FindBest ;get out if more then *3 + TEXT
+n3:
+ mov ax,bx
+ call FindSet_V ;find and set Vertical nums
+ cmp si,[max_line-int10h]
+ ja End_FindBest ; get out if toooo much
+
+ mov si,FP8_ClockTable-int10h ;si=pointer to clock_table
+ xor bp,bp ;bp=best_clock (=0)
+
+FindBestClock:
+ mov ax,[WORD si] ;get clock
+ mul [WORD FP8_1-int10h] ;for more precision
+ div [WORD HT-int10h] ;find line_freq HT MUST >256
+ cmp ax,[FP8_min_LineFreq] ;check if < min_LineFreq
+ jb End_FindBestClock
+ cmp ax,[FP8_max_LineFreq] ;check if > max_LineFreq
+ ja End_FindBestClock
+ mul [WORD FP8_1-int10h] ;for more precision
+ div [WORD VT-int10h] ;find refresh_freq VT>256
+ cmp ax,[FP8_min_refresh] ;check if < min_refresh
+ jb End_FindBestClock
+ cmp ax,[FP8_max_refresh] ;check if > max_refresh
+ ja End_FindBestClock
+ cmp ax,bp ;check if better than best
+ jb End_FindBestClock
+ mov bp,ax ;if yes save as best
+ mov cx,si ;cx=si
+ sub cx,offset(FP8_ClockTable-int10h) ;get BYTE FP8_ClockTable[cx]
+ shr cx,1 ;get WORD FP8_ClockTable[cx]
+End_FindBestClock:
+ inc si
+ inc si ;inc clock_pointer
+ cmp si,offset(FP8_ClockTable_end-int10h) ;check if all clocks where tested
+ jb FindBestClock
+ test bp,bp ;check if nothing found
+ jz FindBest_nothing
+ or ch,bl ;ch=line_mult cl=Clock_index
+FindBest_nothing:
+ jmp FindBest
+End_FindBest:
+
+ test cx,cx ;get out if nothing found
+ jns Not_End_CheckSet
+End_CheckSet:
+ pop es
+ pop ds
+ popa
ret
+Not_End_CheckSet:
+ mov al,ch ;set ax= best line_mult
+ cbw
+ call FindSet_V ;set Vertical Nums (in mem)
-patch2:
- dec si
- dec si
-patch:
+ mov bx, 0000000001111111b ;set and/or start masks
+ test [BYTE gm-int10h],1 ;test if text
+ jnz no_text2
+ cmp cl,2 ;check if *2 & text
+ jne end_SetMSL
+ mov bh,10000000b ;set cga like doubling
+ jmp end_SetMSL ;and get out
+no_text2:
+ mov bl,cl ;set and-mask
+ mov bh,cl ;set or-mask
+ or bl,01100000b ;correct and-mask
+ and bh,00011111b ;correct or-mask (xor bx,xxx...!!! limit line_mult)
+end_SetMSL:
+ and [MSL-int10h],bl
+ or [MSL-int10h],bh ;set MSL
+
+ mov ch,0 ;ch=0 (we no longer need line_mult)
+ push cx ;save Clock_index
+
+ mov dx,CRTC_INDEX
mov al,11h
- out dx,al
+ out dx,al
inc dx
- in al,dx
- and al,7fh
- out dx,al
+ in al,dx ;read VSE
+ and al,7fh ;remove write protect bit
+ out dx,al ;write VSE
dec dx
- mov cx,8
-SetCRT:
- lodsb
- mov ah,al
- mov bx,cx
- mov al,[bx+where-int10h-1]
- cmp al,9 ;MSL (GRRR TEXT 50lines)
- jne no_texti
- out dx,al
- inc dx
- in al,dx
- dec dx
- and al,00001000b
- or ah,al
- mov al,9
-no_texti:
- out dx,ax
- loop SetCRT
- lodsb
+ mov si,offset(where_V)-offset(int10h) ;Read and convert Vga-Regs
+ mov di,offset(what_V)-offset(int10h)
+ mov bx,offset(Real2HSE_code)-offset(int10h)
+
+set_regs:
+ lodsb ;read index from table1
+ test al,al ;check for sign bit
+ js end_set_regs ;get out is set
+ out dx,al ;set index
+ inc dx ;dx= data_port
+ inc si ;skip xxx2real_code
+ lodsb ;get jmp_table_entry
+ cbw ;convert it to word
+ add bx,ax ;and add it to the last one
+ in al,dx ;read (only VSE needs that now)
+ mov ch,al ;put into ch
+ mov ax,[di] ;get data
+ inc di ;add di,2
+ inc di
+ mov cl,1 ;cl=1 (needed for some codes)
+ call bx ;call it
+ out dx,al ;set data
+ dec dx ;dx=data_port
+jmp set_regs
+end_set_regs:
+
+ mov al,7
+ mov ah,[OF-int10h]
+ out dx,ax ;write OF
+
+
+ pop ax
+ push offset(End_CheckSet-int10h) ; for return later
patch_code2:
xchg ax,bx
mov ah,bl ;ah=bl=clock
shl ah,2
- mov dl,LOW(MISC_INPUT) ;dh=3!
+ mov dl,LOW(MISC_INPUT) ;dh=3! dont read from mem (clock_probing)
in al,dx ;al=MiscOutput
mov dl,LOW(MISC_OUTPUT) ;dh=3!
patch_code:
@@ -228,143 +385,211 @@ et4000_clock:
in al,dx
out dx,al ;ET4000 SUCKs
-pop ds
-popa
ret
patch_code_end:
where:
- db 016h ;VBE
- db 015h ;VBS
- db 011h ;VSE / Protect
- db 010h ;VSS
db 007h ;OF
+ db offset(OF2Real_code)-offset(OF2Real_code)
+ db offset(Real2OF_code)-offset(Real2OF_code)
+ db 000h ;HT
+ db offset(HT2Real_code)-offset(OF2Real_code)
+ db offset(Real2HT_code)-offset(Real2OF_code)
+ db 001h ;HDE
+ db offset(HDE2Real_code)-offset(HT2Real_code)
+ db offset(Real2HDE_code)-offset(Real2HT_code)
+ db 002h ;HBS
+ db offset(HBS2Real_code)-offset(HDE2Real_code)
+ db offset(Real2HBS_code)-offset(Real2HDE_code)
+ db 003h ;HBE
+ db offset(HBE2Real_code)-offset(HBS2Real_code)
+ db offset(Real2HBE_code)-offset(Real2HBS_code)
+ db 004h ;HSS
+ db offset(HSS2Real_code)-offset(HBE2Real_code)
+ db offset(Real2HSS_code)-offset(Real2HBE_code)
+ db 005h ;HSE
+ db offset(HSE2Real_code)-offset(HSS2Real_code)
+ db offset(Real2HSE_code)-offset(Real2HSS_code)
+where_V:
db 006h ;VT
- db 012h ;VDEE
+ db offset(VT2Real_code)-offset(HSE2Real_code)
+ db offset(Real2VT_code)-offset(Real2HSE_code)
db 009h ;MSL
+ db offset(MSL2Real_code)-offset(VT2Real_code)
+ db offset(Real2MSL_code)-offset(Real2VT_code)
+ db 010h ;VSS
+ db offset(VSS2Real_code)-offset(MSL2Real_code)
+ db offset(Real2VSS_code)-offset(Real2MSL_code)
+ db 011h ;VSE / Protect
+ db offset(VSE2Real_code)-offset(VSS2Real_code)
+ db offset(Real2VSE_code)-offset(Real2VSS_code)
+ db 012h ;VDE
+ db offset(VDE2Real_code)-offset(VSE2Real_code)
+ db offset(Real2VDE_code)-offset(Real2VSE_code)
+ db 015h ;VBS
+ db offset(VBS2Real_code)-offset(VDE2Real_code)
+ db offset(Real2VBS_code)-offset(Real2VDE_code)
+ db 016h ;VBE
+ db offset(VBE2Real_code)-offset(VBS2Real_code)
+ db offset(Real2VBE_code)-offset(Real2VBS_code)
+ db 0FFh ;end-marker
+what:
+SCM db ?
+CHR_Clock dw ?
+GM db ?
+MR db ?
+OF dw ?
+HT dw ?
+HDE dw ?
+HBS dw ?
+HBE dw ?
+HSS dw ?
+HSE dw ?
+what_V:
+VT dw ?
+MSL dw ?
+VSS dw ?
+VSE dw ?
+VDE dw ?
+VBS dw ?
+VBE dw ?
+LM db ?
+LL dw ?
-CRTParms:
-d1 db 041h ;MSL=41 (?x200 double->triple)
- db 08fh ;VDEE=399
- db 062h ;MSL
- db 057h ;VDEE
- db 087h ;VT
- db 0f0h ;OF
- db 064h ;VSS
- db 086h ;VSE / Protect
- db 05eh ;VBS
- db 079h ;VBE
-c1 db 01h ;Clock=1
+HT2Real_code:
+ add ax,4
+HDE2Real_code:
+ inc ax
+HBS2Real_code:
+HSS2Real_code:
+ mov cl,[chr_clock-int10h]
+ mul cl
+HBE2Real_code: ;IGNORE FOR NOW
+HSE2Real_code: ;IGNORE FOR NOW
+OF2Real_code: ;OK
+MSL2Real_code: ;OK
+VSE2Real_code: ;OK/NEVER USED
+VBE2Real_code: ;OK/NEVER USED (?REAL OK)
+ret
-d2 db 041h ;MSL=41 (?x200 double->quad)
- db 08fh ;VDEE=399
- db 063h ;MSL
- db 01fh ;VDEE
- db 04fh ;VT
- db 0ffh ;OF
- db 02Ch ;VSS
- db 08eh ;VSE / Protect
- db 026h ;VBS
- db 03fh ;VBE
-c2 db 01h ;Clock=1
+VSS2Real_code:
+ inc cx
+VDE2Real_code:
+ inc cx
+VT2Real_code: ;cl must be 1
+ mov ah,[BYTE OF-int10h]
+ shr ah,cl
+ pushf
+ shr ah,4
+ popf
+ rcl ah,1
+ and ah,00000011b
+ inc ax
+ret
-d3 db 041h ;MSL=41 (?x240 double->triple)
- db 0dfh ;VDEE=479
- db 062h ;MSL
- db 0cfh ;VDEE
- db 0ffh ;VT
- db 0f0h ;OF
- db 0dch ;VSS
- db 08eh ;VSE / Protect
- db 0d6h ;VBS
- db 0efh ;VBE
-c3 db 01h ;Clock=1
+VBS2Real_code:
+ mov ah,[BYTE OF-int10h]
+ mov ch,[BYTE MSL-int10h]
+ shr ah,3
+ shr ch,4
+ and ah,00000001b
+ and ch,00000010b
+ or ah,ch
+;inc ax ;??
+ret
-d4 db 041h ;MSL=41 (?x240 double->quad)
- db 0dfh ;VDEE=479
- db 063h ;MSL
- db 0bfh ;VDEE
- db 0efh ;VT
- db 0ffh ;OF
- db 0cch ;VSS
- db 08eh ;VSE / Protect
- db 0c6h ;VBS
- db 0dfh ;VBE
-c4 db 01h ;Clock=1
-
-d5 db 040h ;MSL=40 (?x350 single->double)
- db 05dh ;VDEE=349
- db 061h ;MSL
- db 0bbh ;VDEE
- db 0ebh ;VT
- db 0f0h ;OF
- db 0c8h ;VSS
- db 08ah ;VSE / Protect
- db 0c2h ;VBS
- db 0d6h ;VBE
-c5 db 01h ;Clock=1
+Real2HT_code:
+ sub ax,32
+Real2HDE_code:
+ sub ax,8
+Real2HBS_code:
+Real2HSS_code:
+ mov cl,[chr_clock-int10h]
+ div cl
+Real2HBE_code: ;IGNORE FOR NOW
+Real2HSE_code: ;IGNORE FOR NOW
+Real2OF_code: ;OK/NEVER_Called
+Real2MSL_code: ;OK
+Real2VBE_code: ;OK
+ret
-d6 db 040h ;MSL=41 (?x400 single->double)
- db 08fh ;VDEE=399
- db 061h ;MSL
- db 01fh ;VDEE
- db 04fh ;VT
- db 0ffh ;OF
- db 02Ch ;VSS
- db 08eh ;VSE / Protect
- db 026h ;VBS
- db 03fh ;VBE
-c6 db 01h ;Clock=1
-
-d7 db 040h ;MSL=40 (?x480 single->double)
- db 0dfh ;VDEE=479
- db 061h ;MSL
- db 0bfh ;VDEE
- db 0efh ;VT
- db 0ffh ;OF
- db 0cch ;VSS
- db 08eh ;VSE / Protect
- db 0c6h ;VBS
- db 0dfh ;VBE
-c7 db 01h ;Clock=1
-TextParms:
-d8 db 047h ;MSL=40 TEXT (?x350 single->double)
- db 05dh ;VDEE=349
- db 0e7h ;MSL
- db 0bbh ;VDEE
- db 0ebh ;VT
- db 0f0h ;OF
- db 0c8h ;VSS
- db 08ah ;VSE / Protect
- db 0c2h ;VBS
- db 0d6h ;VBE
-c8 db 01h ;Clock=1
+Real2VSE_code:
+and al,00001111b ;only 0-3 are used
+and ch,01110000b ;preserve 4-6
+or ch,10000000b ;set write-protect-bit
+or al,ch
+ret
-d9 db 047h ;MSL=47 TEXT (?x400 single->double)
- db 08fh ;VDEE=399
- db 0e7h ;MSL
- db 01fh ;VDEE
- db 04fh ;VT
- db 0ffh ;OF
- db 02Ch ;VSS
- db 08eh ;VSE / Protect
- db 026h ;VBS
- db 03fh ;VBE
-c9 db 01h ;Clock=1
+Real2VSS_code:
+ inc cx
+Real2VDE_code:
+ inc cx
+Real2VT_code: ;cl must be 1
+ dec ax
+ shr ah,1
+ pushf
+ shl ah,4
+ popf
+ rcl ah,cl
+ or [BYTE of-int10h],ah
+ret
-da db 047h ;MSL=47 TEXT (?x480 single->double)
- db 0dfh ;VDEE=479
- db 0e7h ;MSL
- db 0bfh ;VDEE
- db 0efh ;VT
- db 0ffh ;OF
- db 0cch ;VSS
- db 08eh ;VSE / Protect
- db 0c6h ;VBS
- db 0dfh ;VBE
-ca db 01h ;Clock=1
+Real2VBS_code:
+ shl ah,3
+ mov ch,ah
+ and ah,00001000b
+ or [BYTE OF-int10h],ah
+ shl ch,1
+ and ch,00100000b
+ or [BYTE MSL-int10h],ch
+ret
-end_pos dd 0
+FindSet_V:
+ mul di ; find new phys_lines
+ mov [VDE-int10h],ax ; save(phys_lines) as new
+ mov si,ax ; save(phys_lines) in si
+ push ax ; save(phys_lines) to stack
+ mul [WORD FPx_1p5-int10h] ; find 1.5%
+ div [WORD FPx_1_-int10h] ;could be replaced by shrd
+ mov bp,ax ; save 1.5% in bp
+ add si,ax ; add to old phys
+ mov [VBS-int10h],si ; save in VBS
+ inc si ; inc it
+ mov [VSS-int10h],si ; save in VSS
+ pop ax
+ push ax ;get old phys from stack
+ mul [WORD FPx_VS-int10h] ; find VS-lenght
+ div [WORD FPx_1_-int10h] ;could be replaced by shrd
+ add si,ax ;add it
+ mov [VSE-int10h],si ; save in VSE
+ pop ax ;get old phys from stack
+ mul [WORD FPx_VB-int10h] ; find VB-lenght
+ div [WORD FPx_1_-int10h] ;could be replaced by shrd
+ add si,ax ;add it
+ mov [VBE-int10h],si ; save in VBE
+ add si,bp ;add 1.5%
+ mov [VT-int10h],si ; save in VT
+ret
+
+
+FP8_1 dw 256
+FP8_min_refresh dw 60 shl 8
+FP8_max_refresh dw 90 shl 8
+FP8_min_LineFreq dw 28 shl 8
+FP8_max_LineFreq dw 72 shl 8
+
+FP8_ClockTable dw 32 dup (?)
+FP8_ClockTable_end:
+
+FPx_1_ dw FPx_1
+
+FPx_1p5 dw FPx_1/67 ;1/.015=67
+FPx_VS dw FPx_1/200 ;1/.005=200
+FPx_VB dw FPx_1/14 ;1/.070=14 !!!(inacurate)
+
+clock_d db 0
+max_line dw 1023
+min_line dw 300
counter db delay2
temp db 0
@@ -386,11 +611,6 @@ install:
commands:
lodsb
- cmp al,'\'
- jne check_ok
- mov [WORD nopi],09090h
- mov al,'/'
-check_ok:
cmp al,'/'
loopne commands
je nunk_command
@@ -410,13 +630,13 @@ nunload:
cmp al,'e'
jne nenable
- mov [BYTE check_set],060h
+ mov [BYTE CheckSet],060h
jmp enable_disable
nenable:
cmp al,'d'
jne ndisable
- mov [BYTE check_set],0C3h
+ mov [BYTE CheckSet],0C3h
jmp enable_disable
ndisable:
@@ -428,49 +648,11 @@ ndisable:
mov ah,0
xchg ax,bx
add bx,bx ;shl bx,1
- add bx,offset(code_table)
- mov si,[bx]
+ mov si,[WORD bx+code_table]
mov di,offset(patch_code)
mov cx,patch_size
rep movsb ;copy clock_code
pop si
- mov di,offset CRTParms
-next_parm:
- xor bx,bx
- mov dl,10
- mov cx,3
- inc si
-loop_dez:
- lodsb
- cmp al,' '
- je no_num
- cmp al,0dh
- je no_num
- cmp al,'-'
- je no_num2
- sub al,30h
- jnb nunk_command2
-probe2:
- jmp probe
-unk_command2:
- jmp unk_command
-nunk_command2:
- cmp al,9h
- ja probe2
- xchg ax,bx
- mul dl
- xchg ax,bx
- add bl,al
- loop loop_dez
-no_num2:
- inc si
- mov [WORD di],-1
-no_num:
- dec si
- mov [di+10],bl
- add di,11
- cmp [WORD di],0
-jne next_parm
call chk_600
jne nalready_installed
@@ -481,13 +663,7 @@ jne next_parm
mov di,offset(patch_code)-int10h
mov si,offset(patch_code)
mov cx,patch_size
- rep movsb
- mov di,offset(CRTParms)-int10h
- mov si,offset(CRTParms)
- mov cx,offset(end_pos)-offset(CRTParms)
- rep movsb
- mov ax,[offset(nopi)]
- mov [es:nopi-int10h],ax
+ rep movsb ;Update TSR Variables
int 20h
enable_disable:
@@ -498,8 +674,8 @@ nnot_inst:
mov dx,offset(p_a)
call wstring
mov es,bx
- mov al,[offset(check_set)]
- mov [es:check_set-int10h],al
+ mov al,[offset(CheckSet)]
+ mov [es:CheckSet-int10h],al
int 20h
nalready_installed:
@@ -665,7 +841,7 @@ nprobeerror:
int 21h ;set new int 8
xor di,di
- mov si,offset clock_buf
+ mov si,offset FP8_ClockTable
probe_loop:
mov ax,di
@@ -697,7 +873,7 @@ end1:
mov ax,0003h
int 10h
- mov si,offset clock_buf
+ mov si,offset FP8_ClockTable
mov cx,32
print_loop:
@@ -789,8 +965,6 @@ vga_clock:
and ax,0000110011110011b
or al,ah
out dx,al ;0-1
-pop ds
-popa
ret
s3_clock:
@@ -819,43 +993,32 @@ s3_clock:
and bl,00001111b
or al,bl
out dx,al
-
- pop ds
- popa
ret
alt_vga_clock:
and ax,0001110011100011b
or al,ah
out dx,al ;0-2
- pop ds
- popa
ret
int8_counter dw 0
-clock_buf db 32 dup (0)
-
code_table:
dw offset(vga_clock)
dw offset(et4000_clock)
dw offset(s3_clock)
dw offset(alt_vga_clock)
-c_r db 'VGA600 ver 0.5 Copyright (C) Michael Niedermayer 1997',cr,lf,'$'
-u_c db 'VGA600 (/|\)vga_card c1 c2 c3 c4 c5 c6 c7 c8 c9 ca|/U|/E|/D',cr,lf
+c_r db 'VGA600 ver 0.6 Beta Copyright (C) Michael Niedermayer 1997',cr,lf,'$'
+u_c db 'VGA600 /vga_card <options>|/U|/E|/D',cr,lf
db ' vga_card: 0=VGA 1=ET4000 2=S3(untested)',cr,lf
- db ' c1: G ?x200(400)->(600) DOT-clock | - if disabled',cr,lf
- db ' c2: G ?x200(400)->(800) DOT-clock | - if disabled',cr,lf
- db ' c3: G ?x240(480)->(720) DOT-clock | - if disabled',cr,lf
- db ' c4: G ?x240(480)->(960) DOT-clock | - if disabled',cr,lf
- db ' c5: G ?x350(350)->(700) DOT-clock | - if disabled',cr,lf
- db ' c6: G ?x400(400)->(800) DOT-clock | - if disabled',cr,lf
- db ' c7: G ?x480(480)->(960) DOT-clock | - if disabled',cr,lf
- db ' c8: T ?x350(350)->(700) DOT-clock | - if disabled',cr,lf
- db ' c9: T ?x400(400)->(800) DOT-clock | - if disabled',cr,lf
- db ' ca: T ?x480(480)->(960) DOT-clock | - if disabled',cr,lf
- db 'ex: VGA600 /1 2 - 4 - 5 6 6 - - -',cr,lf,'$'
+ db ' options: /ALF=x (Max_LineFreq) default=0',cr,lf
+ db ' /ILF=x (Min_LineFreq) default=28',cr,lf
+ db ' /AR=x (Max_Refresh) default=70',cr,lf
+ db ' /IR=x (Min_Refresh) default=60',cr,lf
+ db ' /AL=x (Max_Lines) default=480',cr,lf
+ db ' /IL=x (Min_Lines) default=300',cr,lf
+ db 'ex: VGA600 /1 /ALF=72 /AL=1023 /AR=90',cr,lf,'$'
n_i db 'VGA600 is not installed!',cr,lf,'$'
n_u db 'VGA600 is not unloadable!',cr,lf,'$'
m_e db 'Mem allocating error!',cr,lf,'$'
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