[FFmpeg-devel] [PATCH v3 1/9] lavc/vp9dsp: R-V ipred vert

flow gg hlefthleft at gmail.com
Sun May 12 13:06:39 EEST 2024


> It should be possible to improve ordering to avoid immediate dependency
from ADD to SD

Okay, updated it.

Additionally improved the mc-tap_64 on vlen>=256 and something

<uk7b at foxmail.com> 于2024年5月12日周日 18:04写道:

> From: sunyuechi <sunyuechi at iscas.ac.cn>
>
> C908:
> vp9_vert_8x8_8bpp_c: 22.0
> vp9_vert_8x8_8bpp_rvi: 15.7
> vp9_vert_16x16_8bpp_c: 71.2
> vp9_vert_16x16_8bpp_rvi: 39.0
> vp9_vert_32x32_8bpp_c: 300.2
> vp9_vert_32x32_8bpp_rvi: 135.2
> ---
>  libavcodec/riscv/Makefile        |  1 +
>  libavcodec/riscv/vp9_intra_rvi.S | 71 ++++++++++++++++++++++++++++++++
>  libavcodec/riscv/vp9dsp.h        |  6 +++
>  libavcodec/riscv/vp9dsp_init.c   | 63 ++++++++++++++++------------
>  4 files changed, 114 insertions(+), 27 deletions(-)
>  create mode 100644 libavcodec/riscv/vp9_intra_rvi.S
>
> diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
> index 89273b1cad..ccd060c666 100644
> --- a/libavcodec/riscv/Makefile
> +++ b/libavcodec/riscv/Makefile
> @@ -62,6 +62,7 @@ OBJS-$(CONFIG_VP8DSP) += riscv/vp8dsp_init.o
>  RV-OBJS-$(CONFIG_VP8DSP) += riscv/vp8dsp_rvi.o
>  RVV-OBJS-$(CONFIG_VP8DSP) += riscv/vp8dsp_rvv.o
>  OBJS-$(CONFIG_VP9_DECODER) += riscv/vp9dsp_init.o
> +RV-OBJS-$(CONFIG_VP9_DECODER) += riscv/vp9_intra_rvi.o
>  RVV-OBJS-$(CONFIG_VP9_DECODER) += riscv/vp9_intra_rvv.o
>  OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_init.o
>  RVV-OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_rvv.o
> diff --git a/libavcodec/riscv/vp9_intra_rvi.S
> b/libavcodec/riscv/vp9_intra_rvi.S
> new file mode 100644
> index 0000000000..16b6bdb25a
> --- /dev/null
> +++ b/libavcodec/riscv/vp9_intra_rvi.S
> @@ -0,0 +1,71 @@
> +/*
> + * Copyright (c) 2024 Institue of Software Chinese Academy of Sciences
> (ISCAS).
> + *
> + * This file is part of FFmpeg.
> + *
> + * FFmpeg is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * FFmpeg is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with FFmpeg; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
> 02110-1301 USA
> + */
> +
> +#include "libavutil/riscv/asm.S"
> +
> +#if __riscv_xlen >= 64
> +func ff_v_32x32_rvi
> +        ld           t0, (a3)
> +        ld           t1, 8(a3)
> +        ld           t2, 16(a3)
> +        ld           t3, 24(a3)
> +        .rept 16
> +        add          a7, a0, a1
> +        sd           t0, (a0)
> +        sd           t1, 8(a0)
> +        sd           t2, 16(a0)
> +        sd           t3, 24(a0)
> +        sh1add       a0, a1, a0
> +        sd           t0, (a7)
> +        sd           t1, 8(a7)
> +        sd           t2, 16(a7)
> +        sd           t3, 24(a7)
> +        .endr
> +
> +        ret
> +endfunc
> +
> +func ff_v_16x16_rvi
> +        ld           t0, (a3)
> +        ld           t1, 8(a3)
> +        .rept 8
> +        add          a7, a0, a1
> +        sd           t0, (a0)
> +        sd           t1, 8(a0)
> +        sh1add       a0, a1, a0
> +        sd           t0, (a7)
> +        sd           t1, 8(a7)
> +        .endr
> +
> +        ret
> +endfunc
> +
> +func ff_v_8x8_rvi
> +        ld           t0, (a3)
> +        .rept 4
> +        add          a7, a0, a1
> +        sd           t0, (a0)
> +        sh1add       a0, a1, a0
> +        sd           t0, (a7)
> +        .endr
> +
> +        ret
> +endfunc
> +#endif
> diff --git a/libavcodec/riscv/vp9dsp.h b/libavcodec/riscv/vp9dsp.h
> index 25047ed507..f8bc6563a5 100644
> --- a/libavcodec/riscv/vp9dsp.h
> +++ b/libavcodec/riscv/vp9dsp.h
> @@ -60,6 +60,12 @@ void ff_dc_129_16x16_rvv(uint8_t *dst, ptrdiff_t
> stride, const uint8_t *l,
>                           const uint8_t *a);
>  void ff_dc_129_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l,
>                         const uint8_t *a);
> +void ff_v_32x32_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l,
> +                    const uint8_t *a);
> +void ff_v_16x16_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l,
> +                    const uint8_t *a);
> +void ff_v_8x8_rvi(uint8_t *dst, ptrdiff_t stride, const uint8_t *l,
> +                  const uint8_t *a);
>
>  #define VP9_8TAP_RISCV_RVV_FUNC(SIZE, type, type_idx)
>      \
>  void ff_put_8tap_##type##_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t
> dststride,   \
> diff --git a/libavcodec/riscv/vp9dsp_init.c
> b/libavcodec/riscv/vp9dsp_init.c
> index 69ab39004c..e377d377e3 100644
> --- a/libavcodec/riscv/vp9dsp_init.c
> +++ b/libavcodec/riscv/vp9dsp_init.c
> @@ -24,38 +24,47 @@
>  #include "libavcodec/vp9dsp.h"
>  #include "vp9dsp.h"
>
> -static av_cold void vp9dsp_intrapred_init_rvv(VP9DSPContext *dsp, int bpp)
> +static av_cold void vp9dsp_intrapred_init_riscv(VP9DSPContext *dsp, int
> bpp)
>  {
> -    #if HAVE_RVV
> -        int flags = av_get_cpu_flags();
> +#if HAVE_RV
> +    int flags = av_get_cpu_flags();
>
> -        if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I64 && ff_get_rv_vlenb()
> >= 16) {
> -            dsp->intra_pred[TX_8X8][DC_PRED] = ff_dc_8x8_rvv;
> -            dsp->intra_pred[TX_8X8][LEFT_DC_PRED] = ff_dc_left_8x8_rvv;
> -            dsp->intra_pred[TX_8X8][DC_127_PRED] = ff_dc_127_8x8_rvv;
> -            dsp->intra_pred[TX_8X8][DC_128_PRED] = ff_dc_128_8x8_rvv;
> -            dsp->intra_pred[TX_8X8][DC_129_PRED] = ff_dc_129_8x8_rvv;
> -            dsp->intra_pred[TX_8X8][TOP_DC_PRED] = ff_dc_top_8x8_rvv;
> -        }
> +    if (bpp == 8 && (flags & AV_CPU_FLAG_RVI) && (flags &
> AV_CPU_FLAG_RVB_ADDR)) {
> +# if __riscv_xlen >= 64
> +        dsp->intra_pred[TX_32X32][VERT_PRED] = ff_v_32x32_rvi;
> +        dsp->intra_pred[TX_16X16][VERT_PRED] = ff_v_16x16_rvi;
> +        dsp->intra_pred[TX_8X8][VERT_PRED] = ff_v_8x8_rvi;
> +# endif
> +    }
> +#if HAVE_RVV
> +    if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I64 && ff_get_rv_vlenb() >=
> 16) {
> +        dsp->intra_pred[TX_8X8][DC_PRED] = ff_dc_8x8_rvv;
> +        dsp->intra_pred[TX_8X8][LEFT_DC_PRED] = ff_dc_left_8x8_rvv;
> +        dsp->intra_pred[TX_8X8][DC_127_PRED] = ff_dc_127_8x8_rvv;
> +        dsp->intra_pred[TX_8X8][DC_128_PRED] = ff_dc_128_8x8_rvv;
> +        dsp->intra_pred[TX_8X8][DC_129_PRED] = ff_dc_129_8x8_rvv;
> +        dsp->intra_pred[TX_8X8][TOP_DC_PRED] = ff_dc_top_8x8_rvv;
> +    }
>
> -        if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb()
> >= 16) {
> -            dsp->intra_pred[TX_32X32][DC_PRED] = ff_dc_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][DC_PRED] = ff_dc_16x16_rvv;
> -            dsp->intra_pred[TX_32X32][LEFT_DC_PRED] =
> ff_dc_left_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][LEFT_DC_PRED] =
> ff_dc_left_16x16_rvv;
> -            dsp->intra_pred[TX_32X32][DC_127_PRED] = ff_dc_127_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][DC_127_PRED] = ff_dc_127_16x16_rvv;
> -            dsp->intra_pred[TX_32X32][DC_128_PRED] = ff_dc_128_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][DC_128_PRED] = ff_dc_128_16x16_rvv;
> -            dsp->intra_pred[TX_32X32][DC_129_PRED] = ff_dc_129_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][DC_129_PRED] = ff_dc_129_16x16_rvv;
> -            dsp->intra_pred[TX_32X32][TOP_DC_PRED] = ff_dc_top_32x32_rvv;
> -            dsp->intra_pred[TX_16X16][TOP_DC_PRED] = ff_dc_top_16x16_rvv;
> -        }
> -    #endif
> +    if (bpp == 8 && flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >=
> 16) {
> +        dsp->intra_pred[TX_32X32][DC_PRED] = ff_dc_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][DC_PRED] = ff_dc_16x16_rvv;
> +        dsp->intra_pred[TX_32X32][LEFT_DC_PRED] = ff_dc_left_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][LEFT_DC_PRED] = ff_dc_left_16x16_rvv;
> +        dsp->intra_pred[TX_32X32][DC_127_PRED] = ff_dc_127_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][DC_127_PRED] = ff_dc_127_16x16_rvv;
> +        dsp->intra_pred[TX_32X32][DC_128_PRED] = ff_dc_128_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][DC_128_PRED] = ff_dc_128_16x16_rvv;
> +        dsp->intra_pred[TX_32X32][DC_129_PRED] = ff_dc_129_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][DC_129_PRED] = ff_dc_129_16x16_rvv;
> +        dsp->intra_pred[TX_32X32][TOP_DC_PRED] = ff_dc_top_32x32_rvv;
> +        dsp->intra_pred[TX_16X16][TOP_DC_PRED] = ff_dc_top_16x16_rvv;
> +    }
> +#endif
> +#endif
>  }
>
>  av_cold void ff_vp9dsp_init_riscv(VP9DSPContext *dsp, int bpp, int
> bitexact)
>  {
> -    vp9dsp_intrapred_init_rvv(dsp, bpp);
> +    vp9dsp_intrapred_init_riscv(dsp, bpp);
>  }
> --
> 2.45.0
>
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