[FFmpeg-devel] [PATCH] lavu/riscv: fallback to raw hwprobe() system call

[Rémi Denis-Courmont]

Not all C run-times support this, and even then, it will be a while
before distributions provide recent enough versions thereof.

Since this is a trivial system call wrapper, we might just as well call
the corresponding kernel system call directly where the C run-time lacks
support but the kernel headers are new enough (as is the case on Debian
Unstable at the time of writing). In doing so, we need to add a few more
guards as the first suitable kernel (headers) release did not expose the
V, Zba and Zbb extensions.
---
 configure             |  2 ++
 libavutil/riscv/cpu.c | 20 +++++++++++++++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/configure b/configure
index 2193905a54..dd81e58f99 100755
--- a/configure
+++ b/configure
@@ -2273,6 +2273,7 @@ HAVE_LIST_PUB="
 
 HEADERS_LIST="
     arpa_inet_h
+    asm_hwprobe_h
     asm_types_h
     cdio_paranoia_h
     cdio_paranoia_paranoia_h
@@ -5546,6 +5547,7 @@ elif enabled ppc; then
 
 elif enabled riscv; then
 
+    check_headers asm/hwprobe.h
     check_headers sys/hwprobe.h
 
     if test_cpp_condition stddef.h "__riscv_zbb"; then
diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c
index 3cf4e25bc9..6755f0df69 100644
--- a/libavutil/riscv/cpu.c
+++ b/libavutil/riscv/cpu.c
@@ -31,12 +31,24 @@
 #endif
 #if HAVE_SYS_HWPROBE_H
 #include <sys/hwprobe.h>
+#elif HAVE_ASM_HWPROBE_H
+#include <asm/hwprobe.h>
+#include <sys/syscall.h>
+#include <unistd.h>
+
+static int __riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
+                           size_t cpu_count, unsigned long *cpus,
+                           unsigned int flags)
+{
+        return syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_count, cpus,
+                       flags);
+}
 #endif
 
 int ff_get_cpu_flags_riscv(void)
 {
     int ret = 0;
-#if HAVE_SYS_HWPROBE_H
+#if HAVE_SYS_HWPROBE_H || HAVE_ASM_HWPROBE_H
     struct riscv_hwprobe pairs[] = {
         { RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0 },
         { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 },
@@ -47,13 +59,19 @@ int ff_get_cpu_flags_riscv(void)
             ret |= AV_CPU_FLAG_RVI;
         if (pairs[1].value & RISCV_HWPROBE_IMA_FD)
             ret |= AV_CPU_FLAG_RVF | AV_CPU_FLAG_RVD;
+#ifdef RISCV_HWPROBE_IMA_V
         if (pairs[1].value & RISCV_HWPROBE_IMA_V)
             ret |= AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64
                  | AV_CPU_FLAG_RVV_F32 | AV_CPU_FLAG_RVV_F64;
+#endif
+#ifdef RISCV_HWPROBE_EXT_ZBA
         if (pairs[1].value & RISCV_HWPROBE_EXT_ZBA)
             ret |= AV_CPU_FLAG_RVB_ADDR;
+#endif
+#ifdef RISCV_HWPROBE_EXT_ZBB
         if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
             ret |= AV_CPU_FLAG_RVB_BASIC;
+#endif
 #ifdef RISCV_HWPROBE_EXT_ZVBB
         if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
             ret |= AV_CPU_FLAG_RV_ZVBB;
-- 
2.43.0