[FFmpeg-devel] [PATCH 03/10] lavc/vp8dsp: R-V V put_bilin_v
Rémi Denis-Courmont
remi at remlab.net
Sun May 5 12:05:54 EEST 2024
Le lauantaina 4. toukokuuta 2024, 17.48.32 EEST uk7b at foxmail.com a écrit :
> From: sunyuechi <sunyuechi at iscas.ac.cn>
>
> C908:
> vp8_put_bilin4_v_c: 383.5
> vp8_put_bilin4_v_rvv_i32: 139.7
> vp8_put_bilin8_v_c: 1455.7
> vp8_put_bilin8_v_rvv_i32: 299.7
> vp8_put_bilin16_v_c: 2863.7
> vp8_put_bilin16_v_rvv_i32: 347.7
> ---
> libavcodec/riscv/vp8dsp_init.c | 7 +++++++
> libavcodec/riscv/vp8dsp_rvv.S | 36 ++++++++++++++++++++++++++++++++++
> 2 files changed, 43 insertions(+)
>
> diff --git a/libavcodec/riscv/vp8dsp_init.c b/libavcodec/riscv/vp8dsp_init.c
> index 32cb4893a4..10e1498d01 100644
> --- a/libavcodec/riscv/vp8dsp_init.c
> +++ b/libavcodec/riscv/vp8dsp_init.c
> @@ -58,6 +58,13 @@ av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c)
> c->put_vp8_bilinear_pixels_tab[1][0][2] = ff_put_vp8_bilin8_h_rvv;
> c->put_vp8_bilinear_pixels_tab[2][0][1] = ff_put_vp8_bilin4_h_rvv;
> c->put_vp8_bilinear_pixels_tab[2][0][2] = ff_put_vp8_bilin4_h_rvv;
> +
> + c->put_vp8_bilinear_pixels_tab[0][1][0] = ff_put_vp8_bilin16_v_rvv;
> + c->put_vp8_bilinear_pixels_tab[0][2][0] =
> ff_put_vp8_bilin16_v_rvv; + c->put_vp8_bilinear_pixels_tab[1][1][0]
> = ff_put_vp8_bilin8_v_rvv; + c->put_vp8_bilinear_pixels_tab[1][2][0]
> = ff_put_vp8_bilin8_v_rvv; + c->put_vp8_bilinear_pixels_tab[2][1][0]
> = ff_put_vp8_bilin4_v_rvv; + c->put_vp8_bilinear_pixels_tab[2][2][0]
> = ff_put_vp8_bilin4_v_rvv; }
> #endif
> }
> diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
> index c8d265e516..a58c197ba1 100644
> --- a/libavcodec/riscv/vp8dsp_rvv.S
> +++ b/libavcodec/riscv/vp8dsp_rvv.S
> @@ -152,3 +152,39 @@ endfunc
> func ff_put_vp8_bilin4_h_rvv, zve32x
> put_vp8_bilin_h 4
> endfunc
> +
> +.macro put_vp8_bilin_v
> + li t1, 8
> + li t4, 4
> + sub t1, t1, a6
> +1:
> + add t2, a2, a3
> + addi a4, a4, -1
> + vle8.v v0, (a2)
> + vle8.v v2, (t2)
> + vwmulu.vx v28, v0, t1
> + vwmaccu.vx v28, a6, v2
> + vwaddu.wx v24, v28, t4
> + vnsra.wi v0, v24, 3
> + vse8.v v0, (a0)
> + add a2, a2, a3
> + add a0, a0, a1
> + bnez a4, 1b
> +
> + ret
> +.endm
This looks like it can be factored with a branch rather than a macro.
> +
> +func ff_put_vp8_bilin16_v_rvv, zve32x
> + vsetivli zero, 16, e8, m1, ta, ma
> + put_vp8_bilin_v
> +endfunc
> +
> +func ff_put_vp8_bilin8_v_rvv, zve32x
> + vsetivli zero, 8, e8, mf2, ta, ma
> + put_vp8_bilin_v
> +endfunc
> +
> +func ff_put_vp8_bilin4_v_rvv, zve32x
> + vsetivli zero, 4, e8, mf4, ta, ma
> + put_vp8_bilin_v
> +endfunc
--
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