Update of /cvsroot/mplayer/main/vidix/drivers In directory mail:/var/tmp.root/cvs-serv24861 Modified Files: Makefile Added Files: cyberblade_regs.h cyberblade_vid.c Log Message: EPIA (CyberBlade/i1) driver by Alastair M. Robinson --- NEW FILE --- /* * Copyright 1992-2000 by Alan Hourihane, Wigan, England. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Alan Hourihane not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Alan Hourihane makes no representations * about the suitability of this software for any purpose. It is provided * "as is" without express or implied warranty. * * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. * * Author: Alan Hourihane, alanh@fairlite.demon.co.uk */ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */ #define DEBUG 1 #define NTSC 14.31818 #define PAL 17.73448 /* General Registers */ #define SPR 0x1F /* Software Programming Register (videoram) */ /* 3C4 */ #define RevisionID 0x09 #define ConfPort1 0x0C #define ConfPort2 0x0C #define NewMode2 0x0D #define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */ #define OldMode1 0x0E #define NewMode1 0x0E #define Protection 0x11 #define MCLKLow 0x16 #define MCLKHigh 0x17 #define ClockLow 0x18 #define ClockHigh 0x19 #define SSetup 0x20 #define SKey 0x37 #define SPKey 0x57 /* 3x4 */ #define Offset 0x13 #define Underline 0x14 #define CRTCMode 0x17 #define CRTCModuleTest 0x1E #define FIFOControl 0x20 #define LinearAddReg 0x21 #define DRAMTiming 0x23 #define New32 0x23 #define RAMDACTiming 0x25 #define CRTHiOrd 0x27 #define AddColReg 0x29 #define InterfaceSel 0x2A #define HorizOverflow 0x2B #define GETest 0x2D #define Performance 0x2F #define GraphEngReg 0x36 #define I2C 0x37 #define PixelBusReg 0x38 #define PCIReg 0x39 #define DRAMControl 0x3A #define MiscContReg 0x3C #define CursorXLow 0x40 #define CursorXHigh 0x41 #define CursorYLow 0x42 #define CursorYHigh 0x43 #define CursorLocLow 0x44 #define CursorLocHigh 0x45 #define CursorXOffset 0x46 #define CursorYOffset 0x47 #define CursorFG1 0x48 #define CursorFG2 0x49 #define CursorFG3 0x4A #define CursorFG4 0x4B #define CursorBG1 0x4C #define CursorBG2 0x4D #define CursorBG3 0x4E #define CursorBG4 0x4F #define CursorControl 0x50 #define PCIRetry 0x55 #define PreEndControl 0x56 #define PreEndFetch 0x57 #define PCIMaster 0x60 #define Enhancement0 0x62 #define NewEDO 0x64 /* --- Additions by AMR for Vidix support --- */ #define VideoWin1_HScale 0x80 #define VideoWin1_VScale 0x82 #define VideoWin1_Start 0x86 #define VideoWin1_Stop 0x8a #define Video_Flags 0x8e #define VideoWin1_Y_BPR 0x90 #define VideoWin1_Y_Offset 0x92 #define Video_LineBufferThreshold 0x95 #define Video_LineBufferLevel 0x96 #define Video_Flags2 0x97 /* --- */ #define TVinterface 0xC0 #define TVMode 0xC1 #define ClockControl 0xCF /* 3CE */ #define MiscExtFunc 0x0F #define MiscIntContReg 0x2F #define CyberControl 0x30 #define CyberEnhance 0x31 #define FPConfig 0x33 #define VertStretch 0x52 #define HorStretch 0x53 #define BiosMode 0x5c #define BiosNewMode1 0x5a #define BiosNewMode2 0x5c #define BiosReg 0x5d /* --- MMIO Macros by AMR --- */ int HACKBUCKET12345678; /* Horrible hack to work around cache/speed issue */ #define INB(addr) (HACKBUCKET12345678=*(cyberblade_reg_base+addr)) #define INW(addr) (HACKBUCKET12345678=*(unsigned short *)(cyberblade_reg_base+addr)) #define OUTB(addr,val) (*(cyberblade_reg_base+addr)=(val)) #define OUTW(addr,val) (*(unsigned short *)(cyberblade_reg_base+addr)=(val)) #define SRINB(reg) (OUTB(0x3c4,reg), INB(0x3c5)) #define SROUTB(reg,val) (OUTW(0x3c4,(val)<<8|reg)) #define CRINB(reg) \ (OUTB(cyberblade_crtc+4,reg), INB(cyberblade_crtc+5)) #define CROUTB(reg,val) \ (OUTW(cyberblade_crtc+4,(val)<<8|reg)) /* --- */ --- NEW FILE --- /* Driver for CyberBlade/i1 - Version 0.1.1 Copyright (C) 2002 by Alastair M. Robinson. Based on Permedia 3 driver by Måns Rullgård Thanks to Gilles Frattini for bugfixes Official homepage: http://www.blackfiveservices.co.uk/EPIAVidix.shtml This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA To Do: Implement Hue/Saturation controls Support / Test multiple frames Test colour-key code more extensively */ #include <errno.h> #include <stdio.h> #include <stdlib.h> #include <string.h> #include <inttypes.h> #include <unistd.h> #include "../vidix.h" #include "../fourcc.h" #include "../../libdha/libdha.h" #include "../../libdha/pci_ids.h" #include "../../libdha/pci_names.h" #include "../../config.h" #include "cyberblade_regs.h" pciinfo_t pci_info; unsigned char *cyberblade_reg_base; unsigned char *cyberblade_mem; int cyberblade_crtc; char save_colourkey[6]; /* Helper functions for reading registers. Implementing these as macros leads to problems which are either cache or timing related... */ static int CRINW(int reg) { int result; result=CRINB(reg); result|=CRINB(reg+1)<<8; return(result); } static void CROUTW(int reg,int val) { CROUTB(reg,val&255); CROUTB(reg+1,(val>>8)&255); } static int SRINW(int reg) { int result; result=SRINB(reg); result|=SRINB(reg+1)<<8; return(result); } static void SROUTW(int reg,int val) { SROUTB(reg,val&255); SROUTB(reg+1,(val>>8)&255); } /* --- */ static vidix_capability_t cyberblade_cap = { "Trident CyberBlade i1 driver", "Alastair M. Robinson <blackfive@fakenhamweb.co.uk>", TYPE_OUTPUT, { 0, 0, 0, 0 }, 1024, 1024, 4, 4, -1, FLAG_UPSCALER|FLAG_DOWNSCALER, VENDOR_TRIDENT, -1, { 0, 0, 0, 0 } }; unsigned int vixGetVersion(void) { return(VIDIX_VERSION); } static unsigned short cyberblade_card_ids[] = { DEVICE_TRIDENT_CYBERBLADE_I1 }; static int find_chip(unsigned chip_id) { unsigned i; for(i = 0;i < sizeof(cyberblade_card_ids)/sizeof(unsigned short);i++) { if(chip_id == cyberblade_card_ids[i]) return i; } return -1; } int vixProbe(int verbose, int force) { pciinfo_t lst[MAX_PCI_DEVICES]; unsigned i,num_pci; int err; err = pci_scan(lst,&num_pci); if(err) { printf("[cyberblade] Error occured during pci scan: %s\n",strerror(err)); return err; } else { err = ENXIO; for(i=0; i < num_pci; i++) { if(lst[i].vendor == VENDOR_TRIDENT) { int idx; const char *dname; idx = find_chip(lst[i].device); if(idx == -1) continue; dname = pci_device_name(VENDOR_TRIDENT, lst[i].device); dname = dname ? dname : "Unknown chip"; printf("[cyberblade] Found chip: %s\n", dname); cyberblade_cap.device_id = lst[i].device; err = 0; memcpy(&pci_info, &lst[i], sizeof(pciinfo_t)); break; } } } if(err && verbose) printf("[cyberblade] Can't find chip\n"); return err; } int vixInit(void) { cyberblade_reg_base = map_phys_mem(pci_info.base1, 0x20000); cyberblade_mem = map_phys_mem(pci_info.base0, 0x800000); if(INB(0x3cc)&1) cyberblade_crtc=0x3d0; else cyberblade_crtc=0x3b0; printf("[cyberblade] Using IOBase: 0x%lx, FBBase: 0x%lx, CRTC at 0x%x\n",cyberblade_reg_base,cyberblade_mem,cyberblade_crtc); save_colourkey[0]=SRINB(0x50); save_colourkey[1]=SRINB(0x51); save_colourkey[2]=SRINB(0x52); save_colourkey[3]=SRINB(0x54); save_colourkey[4]=SRINB(0x55); save_colourkey[5]=SRINB(0x56); return 0; } void vixDestroy(void) { int protect; protect=SRINB(0x11); SROUTB(0x11, 0x92); CROUTB(0x8E, 0xc4); /* Disable overlay */ SROUTB(0x50,save_colourkey[0]); SROUTB(0x51,save_colourkey[1]); SROUTB(0x52,save_colourkey[2]); SROUTB(0x54,save_colourkey[3]); SROUTB(0x55,save_colourkey[4]); SROUTB(0x56,save_colourkey[5]); SROUTB(0x11, protect); unmap_phys_mem(cyberblade_reg_base, 0x20000); unmap_phys_mem(cyberblade_mem, 0x800000); } int vixGetCapability(vidix_capability_t *to) { memcpy(to, &cyberblade_cap, sizeof(vidix_capability_t)); return 0; } static int is_supported_fourcc(uint32_t fourcc) { switch(fourcc) { case IMGFMT_YUY2: case IMGFMT_YV12: case IMGFMT_YVU9: case IMGFMT_BGR16: return 1; default: return 0; } } int vixQueryFourcc(vidix_fourcc_t *to) { if(is_supported_fourcc(to->fourcc)) { to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | VID_DEPTH_4BPP | VID_DEPTH_8BPP | VID_DEPTH_12BPP| VID_DEPTH_15BPP| VID_DEPTH_16BPP| VID_DEPTH_24BPP| VID_DEPTH_32BPP; to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; return 0; } else to->depth = to->flags = 0; return ENOSYS; } static int frames[VID_PLAY_MAXFRAMES]; static vidix_grkey_t cyberblade_grkey; int vixGetGrKeys(vidix_grkey_t *grkey) { memcpy(grkey, &cyberblade_grkey, sizeof(vidix_grkey_t)); return(0); } int vixSetGrKeys(const vidix_grkey_t *grkey) { int pixfmt=CRINB(0x38); memcpy(&cyberblade_grkey, grkey, sizeof(vidix_grkey_t)); if(pixfmt&0x28) /* 32 or 24 bpp */ { SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */ SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */ SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */ SROUTB(0x54, 0xff); /* Colour Key Mask */ SROUTB(0x55, 0xff); /* Colour Key Mask */ SROUTB(0x56, 0xff); /* Colour Key Mask */ } else { int tmp=((cyberblade_grkey.ckey.blue & 0xF8)>>3) | ((cyberblade_grkey.ckey.green & 0xfc)<<3) | ((cyberblade_grkey.ckey.red & 0xf8)<<8); SROUTB(0x50, tmp&0xff); /* Colour Key */ SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */ SROUTB(0x52, 0); /* Colour Key */ SROUTB(0x54, 0xff); /* Colour Key Mask */ SROUTB(0x55, 0xff); /* Colour Key Mask */ SROUTB(0x56, 0x00); /* Colour Key Mask */ } return(0); } vidix_video_eq_t equal = { VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | VEQ_CAP_HUE, 300, 100, 0, 0, 0, 0, 0, 0 }; int vixPlaybackGetEq( vidix_video_eq_t * eq) { memcpy(eq,&equal,sizeof(vidix_video_eq_t)); return 0; } int vixPlaybackSetEq( const vidix_video_eq_t * eq) { int br,sat,cr,protect; if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; if(eq->cap & VEQ_CAP_RGB_INTENSITY) { equal.red_intensity = eq->red_intensity; equal.green_intensity = eq->green_intensity; equal.blue_intensity = eq->blue_intensity; } equal.flags = eq->flags; cr = (equal.contrast) * 31 / 2000; cr+=16; if (cr < 0) cr = 0; if(cr > 7) cr = 7; cr=cr<<4 | cr; br = (equal.brightness+1000) * 63 / 2000; if (br < 0) br = 0; if(br > 63) br = 63; if(br>32) br-=32; else br+=32; sat = (equal.saturation + 1000) * 16 / 2000; if (sat < 0) sat = 0; if(sat > 31) sat = 31; protect=SRINB(0x11); SROUTB(0x11, 0x92); SROUTB(0xBC,cr); SROUTW(0xB0,(br<<10)|4); SROUTB(0x11, protect); return 0; } static int YOffs,UOffs,VOffs; int vixConfigPlayback(vidix_playback_t *info) { int shrink, zoom; int src_w, drw_w; int src_h, drw_h; int hscale,vscale; long base0; int y_pitch, uv_pitch; int protect=0; int layout=0; unsigned int i; if(!is_supported_fourcc(info->fourcc)) return -1; src_w = info->src.w; src_h = info->src.h; drw_w = info->dest.w; drw_h = info->dest.h; switch(info->fourcc) { case IMGFMT_YUY2: case IMGFMT_BGR16: y_pitch = (src_w*2 + 15) & ~15; uv_pitch = 0; YOffs=VOffs=UOffs=info->offset.y = info->offset.v = info->offset.u = 0; info->frame_size = y_pitch*src_h; layout=0x0; /* packed */ break; case IMGFMT_YV12: y_pitch = (src_w+15) & ~15; uv_pitch = ((src_w/2)+7) & ~7; YOffs=info->offset.y = 0; VOffs=info->offset.v = y_pitch*src_h; UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/2); info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/2); layout=0x1; /* planar, 4:1:1 */ break; case IMGFMT_YVU9: y_pitch = (src_w+15) & ~15; uv_pitch = ((src_w/4)+3) & ~3; YOffs=info->offset.y = 0; VOffs=info->offset.v = y_pitch*src_h; UOffs=info->offset.u = info->offset.v+(uv_pitch)*(src_h/4); info->frame_size = y_pitch*src_h + 2*uv_pitch*(src_h/4); layout=0x51; /* planar, 16:1:1 */ break; } /* Assume we have 4 MB to play with */ info->num_frames = 0x400000 / info->frame_size; if(info->num_frames > VID_PLAY_MAXFRAMES) info->num_frames = VID_PLAY_MAXFRAMES; /* Start at 4 MB. Let's hope it's not in use. */ base0 = 0x400000; info->dga_addr = cyberblade_mem + base0; info->dest.pitch.y = 16; info->dest.pitch.u = 16; info->dest.pitch.v = 16; for(i = 0; i < info->num_frames; i++) { info->offsets[i] = info->frame_size * i; frames[i] = base0+info->offsets[i]; } /* Unprotect hardware registers... */ protect=SRINB(0x11); SROUTB(0x11, 0x92); SROUTB(0x57, 0xc0); /* Playback key function */ SROUTB(0x21, 0x34); /* Signature control */ SROUTB(0x37, 0x30); /* Video key mode */ { int pixfmt=CRINB(0x38); if(pixfmt&0x28) /* 32 or 24 bpp */ { SROUTB(0x50, cyberblade_grkey.ckey.blue); /* Colour Key */ SROUTB(0x51, cyberblade_grkey.ckey.green); /* Colour Key */ SROUTB(0x52, cyberblade_grkey.ckey.red); /* Colour Key */ SROUTB(0x54, 0xff); /* Colour Key Mask */ SROUTB(0x55, 0xff); /* Colour Key Mask */ SROUTB(0x56, 0xff); /* Colour Key Mask */ } else { int tmp=((cyberblade_grkey.ckey.blue & 0xf8)>>3) |((cyberblade_grkey.ckey.green & 0xfc)<<3) |((cyberblade_grkey.ckey.red & 0xf8)<<8); SROUTB(0x50, tmp&0xff); /* Colour Key */ SROUTB(0x51, (tmp>>8)&0xff); /* Colour Key */ SROUTB(0x52, 0x00); /* Colour Key */ SROUTB(0x54, 0xff); /* Colour Key Mask */ SROUTB(0x55, 0xff); /* Colour Key Mask */ SROUTB(0x56, 0x00); /* Colour Key Mask */ } } /* compute_scale_factor(&src_w, &drw_w, &shrink, &zoom); */ { int HTotal,VTotal,HSync,VSync,Overflow; int tx1,ty1,tx2,ty2; if(CRINB(0xd1)&0x80) { fprintf(stderr,"[cyberblade] Using TV-CRTC\n"); HTotal=CRINB(0xe0); HSync=CRINB(0xe4); VTotal=CRINB(0xe6); VSync=CRINB(0xf0); Overflow=CRINB(0xe7); HTotal <<=3; HTotal-=16; HSync <<=3; VTotal |= (Overflow & 1) <<8; VTotal |= (Overflow & 0x20) <<4; VTotal +=5; VSync |= (Overflow & 4) <<6; VSync |= (Overflow & 0x80) <<2; } else { fprintf(stderr,"[cyberblade] Using Standard CRTC\n"); HTotal=CRINB(0x00); HSync=CRINB(0x04); VTotal=CRINB(0x06); VSync=CRINB(0x10); Overflow=CRINB(0x07); HTotal <<=3; HSync <<=3; VTotal |= (Overflow & 1) <<8; VTotal |= (Overflow & 0x20) <<4; VSync |= (Overflow & 4) <<6; VSync |= (Overflow & 0x80) <<2; } tx1=(HTotal-HSync)+15+info->dest.x; ty1=(VTotal-VSync)-8+info->dest.y; tx2=tx1+info->dest.w; ty2=ty1+info->dest.h; CROUTW(0x86,tx1); CROUTW(0x88,ty1); CROUTW(0x8a,tx2); CROUTW(0x8c,ty2+3); } if(src_w==drw_w) hscale=0; else if(src_w<drw_w) { hscale=((src_w<<10)/(drw_w-2)) & 0x1fff; } else { hscale=0x8000 | ((((src_w/drw_w)-1)&7)<<10) | (((drw_w<<10)/src_w) & 0x3ff); } vscale=(src_h<<10)/(drw_h); if(drw_h<src_h) vscale=0x8000|((drw_h<<10)/(src_h)); /* Write scale factors to hardware */ CROUTW(0x80,hscale); /* Horizontal Scale */ CROUTW(0x82,vscale); /* Vertical Scale */ /* Now set the start address and data layout */ { int lb = (y_pitch+2) >> 2; CROUTB(0x95, ((lb & 0x100)>>1) | 0x08 ); /* Linebuffer level bit 8 & threshold */ CROUTB(0x96, (lb & 0xFF)); /* Linebuffer level */ CROUTB(0x97, 0x00); /* VDE Flags */ CROUTB(0xBA, 0x00); /* Chroma key */ CROUTB(0xBB, 0x00); /* Chroma key */ CROUTB(0xBC, 0xFF); /* Chroma key */ CROUTB(0xBD, 0xFF); /* Chroma key */ CROUTB(0xBE, 0x05); /* Capture control */ if(src_w > 384) layout|=4; /* 2x line buffers */ SROUTB(0x97, layout); CROUTW(0x90,y_pitch); /* Y Bytes per row */ SROUTW(0x9A,uv_pitch); /* UV Bytes per row */ switch(info->fourcc) { case IMGFMT_BGR16: CROUTB(0x8F, 0x24); /* VDE Flags - Edge Recovery & CSC Bypass */ CROUTB(0xBF, 0x02); /* Video format - RGB16 */ SROUTB(0xBE, 0x0); /* HSCB disabled */ break; default: CROUTB(0x8F, 0x20); /* VDE Flags - Edge Recovery */ CROUTB(0xBF, 0x00); /* Video format - YUV */ SROUTB(0xBE, 0x03); /* HSCB enabled */ break; } CROUTB(0x92, ((base0+info->offset.y) >> 3) &0xff); /* Lower 8 bits of start address */ CROUTB(0x93, ((base0+info->offset.y) >> 11) &0xff); /* Mid 8 bits of start address */ CROUTB(0x94, ((base0+info->offset.y) >> 19) &0xf); /* Upper 4 bits of start address */ SROUTB(0x80, ((base0+info->offset.v) >> 3) &0xff); /* Lower 8 bits of start address */ SROUTB(0x81, ((base0+info->offset.v) >> 11) &0xff); /* Mid 8 bits of start address */ SROUTB(0x82, ((base0+info->offset.v) >> 19) &0xf); /* Upper 4 bits of start address */ SROUTB(0x83, ((base0+info->offset.u) >> 3) &0xff); /* Lower 8 bits of start address */ SROUTB(0x84, ((base0+info->offset.u) >> 11) &0xff); /* Mid 8 bits of start address */ SROUTB(0x85, ((base0+info->offset.u) >> 19) &0xf); /* Upper 4 bits of start address */ } vixPlaybackSetEq(&equal); /* Protect hardware registers again */ SROUTB(0x11, protect); return 0; } int vixPlaybackOn(void) { /* Enable overlay */ CROUTB(0x8E, 0xd4); /* VDE Flags*/ return 0; } int vixPlaybackOff(void) { /* Disable overlay */ CROUTB(0x8E, 0xc4); /* VDE Flags*/ return 0; } int vixPlaybackFrameSelect(unsigned int frame) { int protect; protect=SRINB(0x11); SROUTB(0x11, 0x92); /* Set overlay address to that of selected frame */ CROUTB(0x92, ((frames[frame]+YOffs) >> 3) &0xff); /* Lower 8 bits of start address */ CROUTB(0x93, ((frames[frame]+YOffs) >> 11) &0xff); /* Mid 8 bits of start address */ CROUTB(0x94, ((frames[frame]+YOffs) >> 19) &0xf); /* Upper 4 bits of start address */ SROUTB(0x80, ((frames[frame]+VOffs) >> 3) &0xff); /* Lower 8 bits of start address */ SROUTB(0x81, ((frames[frame]+VOffs) >> 11) &0xff); /* Mid 8 bits of start address */ SROUTB(0x82, ((frames[frame]+VOffs) >> 19) &0xf); /* Upper 4 bits of start address */ SROUTB(0x83, ((frames[frame]+UOffs) >> 3) &0xff); /* Lower 8 bits of start address */ SROUTB(0x84, ((frames[frame]+UOffs) >> 11) &0xff); /* Mid 8 bits of start address */ SROUTB(0x85, ((frames[frame]+UOffs) >> 19) &0xf); /* Upper 4 bits of start address */ SROUTB(0x11, protect); return 0; } Index: Makefile =================================================================== RCS file: /cvsroot/mplayer/main/vidix/drivers/Makefile,v retrieving revision 1.13 retrieving revision 1.14 diff -u -r1.13 -r1.14 --- Makefile 22 Aug 2002 23:29:46 -0000 1.13 +++ Makefile 21 Dec 2002 13:06:23 -0000 1.14 @@ -4,6 +4,11 @@ BINDIR = $(LIBDIR)/mplayer/vidix +CYBERBLADE_VID=cyberblade_vid.so +CYBERBLADE_SRCS=cyberblade_vid.c +CYBERBLADE_OBJS=cyberblade_vid.o +CYBERBLADE_LIBS=-L../../libdha -ldha -lm +CYBERBLADE_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. RADEON_VID=radeon_vid.so RADEON_SRCS=radeon_vid.c @@ -21,7 +26,7 @@ PM3_SRCS=pm3_vid.c PM3_OBJS=pm3_vid.o PM3_LIBS=-L../../libdha -ldha -PM3_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. +PM3_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. MACH64_VID=mach64_vid.so MACH64_SRCS=mach64_vid.c @@ -33,7 +38,7 @@ MGA_SRCS=mga_vid.c MGA_OBJS=mga_vid.o MGA_LIBS=-L../../libdha -ldha -lm -MGA_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. +MGA_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. MGA_CRTC2_VID=mga_crtc2_vid.so MGA_CRTC2_SRCS=mga_vid.c @@ -41,12 +46,18 @@ MGA_CRTC2_LIBS=-L../../libdha -ldha -lm MGA_CRTC2_CFLAGS=$(OPTFLAGS) -fPIC -I. -I.. -DCRTC2 -all: $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) $(PM3_VID) +all: $(CYBERBLADE_VID) $(RADEON_VID) $(RAGE128_VID) $(MACH64_VID) $(NVIDIA_VID) $(GENFB_VID) $(MGA_VID) $(MGA_CRTC2_VID) $(PM3_VID) .SUFFIXES: .c .o # .PHONY: all clean + +$(CYBERBLADE_OBJS): $(CYBERBLADE_SRCS) + $(CC) -c $(CYBERBLADE_CFLAGS) -o $@ $< + +$(CYBERBLADE_VID): $(CYBERBLADE_OBJS) + $(LD) $(CYBERBLADE_LIBS) -shared -soname $(CYBERBLADE_VID) -o $(CYBERBLADE_VID) $(CYBERBLADE_OBJS) $(PM3_OBJS): $(PM3_SRCS) $(CC) -c $(PM3_CFLAGS) -o $@ $<