Index: postproc/swscale_template.c
===================================================================
RCS file: /cvsroot/mplayer/main/postproc/swscale_template.c,v
retrieving revision 1.114
diff -u -r1.114 swscale_template.c
--- postproc/swscale_template.c	2 Jun 2005 20:54:03 -0000	1.114
+++ postproc/swscale_template.c	18 Jun 2005 00:52:08 -0000
@@ -765,14 +765,14 @@
 		asm volatile(
 				YSCALEYUV2YV12X(0, CHR_MMX_FILTER_OFFSET)
 				:: "r" (&c->redDither),
-				"r" (uDest), "m" ((long)chrDstW)
+				"r" (uDest), "p" ((long)chrDstW)
 				: "%"REG_a, "%"REG_d, "%"REG_S
 			);
 
 		asm volatile(
 				YSCALEYUV2YV12X(4096, CHR_MMX_FILTER_OFFSET)
 				:: "r" (&c->redDither),
-				"r" (vDest), "m" ((long)chrDstW)
+				"r" (vDest), "p" ((long)chrDstW)
 				: "%"REG_a, "%"REG_d, "%"REG_S
 			);
 	}
@@ -780,7 +780,7 @@
 	asm volatile(
 			YSCALEYUV2YV12X(0, LUM_MMX_FILTER_OFFSET)
 			:: "r" (&c->redDither),
-			   "r" (dest), "m" ((long)dstW)
+			   "r" (dest), "p" ((long)dstW)
 			: "%"REG_a, "%"REG_d, "%"REG_S
 		);
 #else
@@ -2547,7 +2547,7 @@
 		"cmp %2, %%"REG_a"		\n\t"
 		" jb 1b				\n\t"
 
-		:: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
+		:: "m" (src1), "m" (dst), "p" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
 		"r" (src2)
 		: "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
 		);
Index: libavcodec/libpostproc/postprocess_template.c
===================================================================
RCS file: /cvsroot/ffmpeg/ffmpeg/libavcodec/libpostproc/postprocess_template.c,v
retrieving revision 1.95
diff -u -r1.95 postprocess_template.c
--- libavcodec/libpostproc/postprocess_template.c	13 May 2005 21:04:16 -0000	1.95
+++ libavcodec/libpostproc/postprocess_template.c	18 Jun 2005 00:52:11 -0000
@@ -3495,7 +3495,7 @@
 				"prefetchnta 32(%%"REG_a", %0)	\n\t"
 				"prefetcht0 32(%%"REG_d", %2)	\n\t"
 			:: "r" (srcBlock), "r" ((long)srcStride), "r" (dstBlock), "r" ((long)dstStride),
-			"m" ((long)x), "m" ((long)copyAhead)
+			"p" ((long)x), "p" ((long)copyAhead)
 			: "%"REG_a, "%"REG_d
 			);
 
@@ -3641,7 +3641,7 @@
 				"prefetchnta 32(%%"REG_a", %0)	\n\t"
 				"prefetcht0 32(%%"REG_d", %2)	\n\t"
 			:: "r" (srcBlock), "r" ((long)srcStride), "r" (dstBlock), "r" ((long)dstStride),
-			"m" ((long)x), "m" ((long)copyAhead)
+			"p" ((long)x), "p" ((long)copyAhead)
 			: "%"REG_a, "%"REG_d
 			);