[MPlayer-dev-eng] Shall we set HAVE_FAST_CMOV in mplayer's configure?

[Zuxy Meng]

Hi,

2007/1/30, Guillaume POIRIER <poirierg at gmail.com>:
> Hi,
>
> On 1/30/07, Zuxy Meng <zuxy.meng at gmail.com> wrote:
> > 2007/1/30, Guillaume POIRIER <poirierg at gmail.com>:
> > > On 1/30/07, Zuxy Meng <zuxy.meng at gmail.com> wrote:
> > > > Should Netburst CPUs use branchless or branchy asm?
> > >
> > > The benches I ran when this code was introduced telles me that branchy
> > > ASM is the one that performs best on Netburst-based CPU.
> >
> > So why HAVE_FAST_CMOV? We can just define something like HAVE_TRACE_CACHE and
>
> Because the effectiveness of this specific code depends on knowing if
> cmov is fast or not. It doesn't depend on knowing if the cpu has a
> trace cache.
> To put it another way, a tracecache-less cpu could have slow cmov, and
> would would be expected to be slow running the said code.
>
> Remember that HAVE_FAST_CMOV implies HAVE_CMOV
>
>
> > #ifdef HAVE_TRACE_CACHE
> > use branchy asm (for P4s)
> > #elif defined(HAVE_CMOV)
> > use branchless cmov asm (for P6s and Athlons)
> > #else
> > use branchless setcc asm (for P5s and K6s)
> > endif
>
> First, there aren't currently any cabac code with setcc opcode, though
> I imagine it should be quite simple to adapt cmov code to setcc...
>
> As far as I can see, this should work:
>
> #ifdef HAVE_FAST_CMOV

I guess you meant ifndef?

> use branchy asm (for P4s)
> #elif defined(HAVE_CMOV)
> use branchless cmov asm (for P6s and Athlons)
> #else
> use branchless setcc asm (for P5s and K6s)

No setcc, of course:-)
> endif

So HAVE_FAST_CMOV no more implies HAVE_CMOV?
-- 
Zuxy
Beauty is truth,
While truth is beauty.
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