[MPlayer-dev-eng] [PATCH] fixed point faad, gnu assembler etc.

Michael Niedermayer michaelni at gmx.at
Thu Apr 20 09:04:58 CEST 2006


Hi

On Wed, Apr 19, 2006 at 11:40:35PM -0400, Rich Felker wrote:
> On Wed, Apr 19, 2006 at 10:28:35PM +0200, Reimar Döffinger wrote:
> > +#elif defined(__GNUC__) && (defined (ARCH_X86) || defined(ARCH_X86_64))
> > +#define MUL_S(A,B,S) \
> > +  __asm__ __volatile__ (\
> > +    "imul %1                 \n\t"\
> > +    "shrd %%cl, %%edx, %%eax \n\t"\
> 
> There is no such i386 opcode as shrd as far as I know....

intels instruction set reference:
-------------
SHRD Double Precision Shift Right
  Opcode            Instruction               Description
  0F AC             SHRD r/m16, r16, imm8     Shift r/m16 to right imm8 places while shifting bits from
                                              r16 in from the left
  0F AD             SHRD r/m16, r16, CL       Shift r/m16 to right CL places while shifting bits from r16
                                              in from the left
  0F AC             SHRD r/m32, r32, mm8      Shift r/m32 to right imm8 places while shifting bits from
                                              r32 in from the left
  0F AD             SHRD r/m32, r32, CL       Shift r/m32 to right CL places while shifting bits from r32
                                              in from the left
Description
Shifts the first operand (destination operand) to the right the number of bits specified by the third
operand (count operand). The second operand (source operand) provides bits to shift in from the
left (starting with the most significant bit of the destination operand). The destination operand
can be a register or a memory location; the source operand is a register. The count operand is an
unsigned integer that can be an immediate byte or the contents of the CL register. Only bits 0
through 4 of the count are used, which masks the count to a value between 0 and 31. If the count
is greater than the operand size, the result in the destination operand is undefined.
If the count is 1 or greater, the CF flag is filled with the last bit shifted out of the destination
operand. For a 1-bit shift, the OF flag is set if a sign change occurred; otherwise, it is cleared. If
the count operand is 0, the flags are not affected.
The SHRD instruction is useful for multiprecision shifts of 64 bits or more.
--------------

theres no note saying it works only on some x86 cpus so i think it works on
386+ ...

btw, someone replace %%cl with a constant, as its faster (assuming its
constant)

[...]
-- 
Michael

In the past you could go to a library and read, borrow or copy any book
Today you'd get arrested for mere telling someone where the library is




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