[MPlayer-dev-eng] [PATCH] nvidia vidix AMD64, equalizer etc.
Reimar Döffinger
Reimar.Doeffinger at stud.uni-karlsruhe.de
Thu Sep 1 18:56:14 CEST 2005
Hi,
the attached patch fixes several things (I sent the all in one patch to
get comments).
1) It adds FX Go 5700 to the supported cards.
2) It changes some int / int32_t to intptr_t to make it work in 64 bit
3) changes some ifdefs in libdha/mtrr.c so it will work on AMD64
4) Adds equalizer support (brightness, contrast, saturation and hue).
Somebody should test on older hardware
5) changes int x=info->wx?info->wx:8, y=info->wy?info->wy:8; to
int x=info->wx, y=info->wy; since it gives ugly borders on top and right
with cvidix and fullscreen. Why was this done? Is this needed for some
cards? Removing it gave no problems for me and fixed the issue with
cvidix...
Please comment and test (and maybe at least the list of supported devices
should be synced from upstream).
Greetings,
Reimar Döffinger
-------------- next part --------------
Index: libdha/mtrr.c
===================================================================
RCS file: /cvsroot/mplayer/main/libdha/mtrr.c,v
retrieving revision 1.6
diff -u -r1.6 mtrr.c
--- libdha/mtrr.c 7 Jun 2002 22:43:25 -0000 1.6
+++ libdha/mtrr.c 1 Sep 2005 14:40:48 -0000
@@ -23,7 +23,6 @@
#endif
#endif
-#if defined( __i386__ )
int mtrr_set_type(unsigned base,unsigned size,int type)
{
#ifdef linux
@@ -50,8 +49,7 @@
return wr_len == strlen(sout) ? 0 : EPERM;
}
return ENOSYS;
-#elif defined (__NetBSD__)
-#if __NetBSD_Version__ > 105240000
+#elif defined (__i386__ ) && defined (__NetBSD__) && __NetBSD_Version__ > 105240000
struct mtrr *mtrrp;
int n;
@@ -72,14 +70,4 @@
/* NetBSD prior to 1.5Y doesn't have MTRR support */
return ENOSYS;
#endif
-#else
-#warning Please port MTRR stuff!!!
- return ENOSYS;
-#endif
}
-#else
-int mtrr_set_type(unsigned base,unsigned size,int type)
-{
- return ENOSYS;
-}
-#endif
Index: libdha/oth/pci.db
===================================================================
RCS file: /cvsroot/mplayer/main/libdha/oth/pci.db,v
retrieving revision 1.16
diff -u -r1.16 pci.db
--- libdha/oth/pci.db 5 Jul 2005 14:57:48 -0000 1.16
+++ libdha/oth/pci.db 1 Sep 2005 14:41:19 -0000
@@ -2673,6 +2673,7 @@
d 10de0338 NV35GL [Quadro FX 3000] 0
d 10de0341 NV 36 [GeForce 5700 Ultra] 1 MSI MS-8938, 128 MB DDR2, DVI, TV-out, AGP
d 10de0342 NV 36 [GeForce 5700] 1 MSI FX5700-TD128, 128 MB DDR, DVI, TV-out, AGP
+d 10de0347 NV 36 [GeForce FX Go 5700] 0 Used in Acer Aspire 1523WLMi
v 10df Emulex Corporation 0
d 10df1ae5 LP6000 Fibre Channel Host Adapter 0
d 10dff085 LP850 Fibre Channel Adapter 0
Index: vidix/drivers/nvidia_vid.c
===================================================================
RCS file: /cvsroot/mplayer/main/vidix/drivers/nvidia_vid.c,v
retrieving revision 1.22
diff -u -r1.22 nvidia_vid.c
--- vidix/drivers/nvidia_vid.c 1 Feb 2004 11:35:28 -0000 1.22
+++ vidix/drivers/nvidia_vid.c 1 Sep 2005 14:41:22 -0000
@@ -13,6 +13,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
+#include <math.h>
#include <inttypes.h>
#include <unistd.h>
@@ -61,6 +62,14 @@
#define NV_ARCH_20 0x20
#define NV_ARCH_30 0x30
+// since no useful information whatsoever is passed
+// to the equalizer functions we need this
+static struct {
+ uint32_t lum; // luminance (brightness + contrast)
+ uint32_t chrom; // chrominance (saturation + hue)
+ vidix_video_eq_t vals;
+} eq;
+
struct nvidia_cards {
unsigned short chip_id;
unsigned short arch;
@@ -135,7 +144,8 @@
{DEVICE_NVIDIA_NV34GL_QUADRO_FX,NV_ARCH_30},
{DEVICE_NVIDIA_NV35_GEFORCE_FX,NV_ARCH_30},
{DEVICE_NVIDIA_NV35_GEFORCE_FX2,NV_ARCH_30},
- {DEVICE_NVIDIA_NV35GL_QUADRO_FX,NV_ARCH_30}
+ {DEVICE_NVIDIA_NV35GL_QUADRO_FX,NV_ARCH_30},
+ {DEVICE_NVIDIA_NV_36_GEFORCE,NV_ARCH_30},
};
@@ -265,7 +275,7 @@
struct rivatv_chip chip; /* NV architecture structure */
void* video_base; /* virtual address of control region */
void* control_base; /* virtual address of fb region */
- unsigned long picture_base; /* direct pointer to video picture */
+ uintptr_t picture_base; /* direct pointer to video picture */
unsigned long picture_offset; /* offset of video picture in frame buffer */
// struct rivatv_dma dma; /* DMA structure */
unsigned int cur_frame;
@@ -506,7 +516,7 @@
void rivatv_overlay_start (struct rivatv_info *info,int bufno){
uint32_t base, size, offset, xscale, yscale, pan;
uint32_t value;
- int x=info->wx?info->wx:8, y=info->wy?info->wy:8;
+ int x=info->wx, y=info->wy;
int lwidth=info->d_width, lheight=info->d_height;
int bps;
int i;
@@ -584,10 +594,10 @@
}
/* NV_PVIDEO_LUMINANCE */
- VID_WR32 (info->chip.PVIDEO, 0x910 + 0, 0x00001000);
+ VID_WR32 (info->chip.PVIDEO, 0x910 + 0, eq.lum);
//VID_WR32 (info->chip.PVIDEO, 0x910 + 4, 0x00001000);
/* NV_PVIDEO_CHROMINANCE */
- VID_WR32 (info->chip.PVIDEO, 0x918 + 0, 0x00001000);
+ VID_WR32 (info->chip.PVIDEO, 0x918 + 0, eq.chrom);
//VID_WR32 (info->chip.PVIDEO, 0x918 + 4, 0x00001000);
/* NV_PVIDEO_OFFSET */
@@ -712,7 +722,7 @@
info = (rivatv_info*)calloc(1,sizeof(rivatv_info));
info->control_base = map_phys_mem(pci_info.base0, 0x00C00000 + 0x00008000);
info->chip.arch = nvidia_card_ids[find_chip(pci_info.device)].arch;
- printf("[nvidia_vid] arch %x register base %x\n",info->chip.arch,(unsigned int)info->control_base);
+ printf("[nvidia_vid] arch %x register base %p\n",info->chip.arch,info->control_base);
info->chip.PFIFO = (uint32_t *) (info->control_base + 0x00002000);
info->chip.FIFO = (uint32_t *) (info->control_base + 0x00800000);
info->chip.PMC = (uint32_t *) (info->control_base + 0x00000000);
@@ -750,7 +760,7 @@
info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize);
/* This may trash your screen for resolutions greater than 1024x768, sorry. */
info->picture_offset = 1024*768* 4 * ((info->chip.fbsize > 4194304)?2:1);
- info->picture_base = (uint32_t) info->video_base + info->picture_offset;
+ info->picture_base = (uintptr_t) info->video_base + info->picture_offset;
info->chip.PRAMIN = (uint32_t *) (info->video_base + 0x00C00000);
break;
}
@@ -762,7 +772,7 @@
info->video_base = map_phys_mem(pci_info.base1, info->chip.fbsize);
info->picture_offset = info->chip.fbsize - NV04_BES_SIZE;
// info->picture_base = (unsigned long)map_phys_mem(pci_info.base1+info->picture_offset,NV04_BES_SIZE);
- info->picture_base = (uint32_t) info->video_base + info->picture_offset;
+ info->picture_base = (uintptr_t) info->video_base + info->picture_offset;
break;
}
}
@@ -783,6 +793,11 @@
info->cur_frame = 0;
info->use_colorkey = 0;
+ eq.lum = 0x00001000;
+ eq.chrom = 0x00001000;
+ memset(&eq.vals, 0, sizeof(vidix_video_eq_t));
+ eq.vals.cap = VEQ_CAP_BRIGHTNESS | VEQ_CAP_CONTRAST |
+ VEQ_CAP_SATURATION | VEQ_CAP_HUE;
return 0;
}
@@ -897,3 +912,31 @@
info->cur_frame = frame/*(frame+1)%info->num_frames*/;
return 0;
}
+
+int vixPlaybackSetEq(const vidix_video_eq_t *eq_parm) {
+ double angle;
+ int16_t chrom_cos, chrom_sin;
+ vidix_video_eq_t new_eq;
+ vixPlaybackGetEq(&new_eq);
+ if (eq_parm->cap & VEQ_CAP_BRIGHTNESS)
+ new_eq.brightness = eq_parm->brightness;
+ if (eq_parm->cap & VEQ_CAP_CONTRAST)
+ new_eq.contrast = eq_parm->contrast;
+ if (eq_parm->cap & VEQ_CAP_SATURATION)
+ new_eq.saturation = eq_parm->saturation;
+ if (eq_parm->cap & VEQ_CAP_HUE)
+ new_eq.hue = eq_parm->hue;
+ eq.lum = (((new_eq.brightness * 512 + 500) / 1000) << 16) |
+ ((((new_eq.contrast + 1000) * 8191 + 1000) / 2000) & 0xffff);
+ angle = (double)new_eq.hue / 1000.0 * 3.1415927;
+ chrom_cos = ((new_eq.saturation + 1000) * 8191 * cos(angle) + 1000) / 2000;
+ chrom_sin = ((new_eq.saturation + 1000) * 8191 * sin(angle) + 1000) / 2000;
+ eq.chrom = chrom_sin << 16 | chrom_cos;
+ return 0;
+}
+
+int vixPlaybackGetEq(vidix_video_eq_t *eq_parm) {
+ memcpy(eq_parm, &eq.vals, sizeof(vidix_video_eq_t));
+ return 0;
+}
+
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