[MPlayer-dev-eng] [PATCH] Correctly set optimization flag for Athlon. Closes Bug #267

[Diego Biurrun]

On Wed, Nov 30, 2005 at 01:13:51PM +0800, Zuxy Meng wrote:
> 
> AMD's Family 6 CPUs come with two flavors: one that supports SSE and
> one that dosen't. However, they're not easily distinguishible from
> their signature (family, model and stepping). Original configure might
> set -march=athlon-4 for a CPU that dosen't support SSE and causes gcc
> to generate code that won't run on the target machine. The attached
> patch corrects this.
> 
> BTW: Someone might wonder why it's rarely reported before. The reason
> I guess is two-fold: firstly Duron with model 6 or 8 is uncommon, and
> secondly gcc in most cases won't generate SSE instructions for normal
> C code, unless one of -ftree-vectorize or -mfpunit=sse is specified.

Sounds reasonable and I'm always glad to close open bugs in Bugzilla.  A
few questions, though:

>      6) iproc=686
> +	# It's a bit difficult to determine the correct type of AMD's CPUs
> +	# of Family 6 only from its signature.

The second part of this sentence no verb and thus difficult to.

> -    *) proc=athlon-xp iproc=686 ;;
> +    *) proc=k8 iproc=686 ;;

Sure about this?  Here's what I have in the gcc manual page:

  k8, opteron, athlon64, athlon-fx
    AMD K8 core based CPUs with x86-64 instruction set support. (This
    supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit
    instruction set extensions.)


Diego