[Mplayer-cvslog] CVS: main/vidix/drivers radeon_vid.c,1.88,1.89

Sascha Sommer CVS syncmail at mplayerhq.hu
Sat Oct 9 15:13:31 CEST 2004


CVS change done by Sascha Sommer CVS

Update of /cvsroot/mplayer/main/vidix/drivers
In directory mail:/var2/tmp/cvs-serv24711/vidix/drivers

Modified Files:
	radeon_vid.c 
Log Message:
correct scaling when the screen resolution is smaller than the flat panel resolution

Index: radeon_vid.c
===================================================================
RCS file: /cvsroot/mplayer/main/vidix/drivers/radeon_vid.c,v
retrieving revision 1.88
retrieving revision 1.89
diff -u -r1.88 -r1.89
--- radeon_vid.c	15 Sep 2004 08:02:51 -0000	1.88
+++ radeon_vid.c	9 Oct 2004 13:13:28 -0000	1.89
@@ -309,6 +309,19 @@
   return yres + 1;
 }
 
+/* get flat panel x resolution*/
+static uint32_t radeon_get_fp_xres( void ){
+  uint32_t xres=(INREG(FP_HORZ_STRETCH)&0x00fff000)>>16;
+  xres=(xres+1)*8;
+  return xres;
+}
+
+/* get flat panel y resolution*/
+static uint32_t radeon_get_fp_yres( void ){
+  uint32_t yres=(INREG(FP_VERT_STRETCH)&0x00fff000)>>12;
+  return yres+1;
+}
+
 static void radeon_wait_vsync(void)
 {
     int i;
@@ -1292,6 +1305,7 @@
   printf(RADEON_MSG"radeon_overlay_off=%08X\n",radeon_overlay_off);
   printf(RADEON_MSG"radeon_ram_size=%08X\n",radeon_ram_size);
   printf(RADEON_MSG"video mode: %ux%u@%u\n",radeon_get_xres(),radeon_get_yres(),radeon_vid_get_dbpp());
+  printf(RADEON_MSG"flatpanel size: %ux%u\n",radeon_get_fp_xres(),radeon_get_fp_yres());
   printf(RADEON_MSG"*** Begin of OV0 registers dump ***\n");
   for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++)
 	printf(RADEON_MSG"%s = %08X\n",vregs[i].sname,INREG(vregs[i].name));
@@ -1569,7 +1583,12 @@
     if(radeon_is_dbl_scan()) dest_h *= 2;
     besr.dest_bpp = radeon_vid_get_dbpp();
     besr.fourcc = config->fourcc;
-    besr.v_inc = (src_h << 20) / dest_h;
+
+    /* flat panel */
+    if(INREG(FP_VERT_STRETCH)&VERT_STRETCH_ENABLE){
+      besr.v_inc = (src_h * radeon_get_yres() / radeon_get_fp_yres() << 20) / dest_h;
+    }
+    else besr.v_inc = (src_h << 20) / dest_h;
     if(radeon_is_interlace()) besr.v_inc *= 2;
     h_inc = (src_w << 12) / dest_w;
 




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