[FFmpeg-devel] [PATCH] lavc/vc1dsp: R-V V inv_trans

[Rémi Denis-Courmont]

Le tiistaina 5. joulukuuta 2023, 21.25.12 EET flow gg a écrit :
> > This block can be folded into the next. You don't need to check VLENB
> 
> twice.
> 
> Changed.
> 
> > Instruction scheduling could be better, especially on in-order CPUs.
> 
> I put the vload at the front, and then proceeded with the t2 operation, but
> I'm not sure...
> 
> > You don't need to reset the AVL here, just pass zero.
> 
> Changed.
> 
> > vsetivli
> 
> Changed.

You changed more than I asked for. The immediate AVL is a 5-bit unsigned 
integer, so it should not be possible to assemble 32 or 64, unless you have a 
preprocessor that silently rewrites `vsetivli` into `vsetvli` (If so, that 
sounds very iffy because `vsetivli zero` has no scratch X register to work 
with).

FWIW CanMV-K230 boards are on sale for under 500 RMB.

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