[FFmpeg-devel] [PATCH/RFC]Allow compilation without HAVE_6REGS

[Carl Eugen Hoyos]

Michael Niedermayer <michaelni <at> gmx.at> writes:

> On Fri, Apr 18, 2014 at 02:48:00PM +0000, Carl Eugen Hoyos wrote:
> > Carl Eugen Hoyos <cehoyos <at> ag.or.at> writes:
> > 
> > > Attached patch is needed here for compilation without HAVE_6REGS
> 
> should be ok if these all use 6 or more registers

I am not sure which parameters must be counted:

libavfilter/vf_noise.c line_noise_avg_mmx():
    :: "r" (src+mmx_len), "r" (shift[0]+mmx_len), "r" (shift[1]+mmx_len), 
       "r" (shift[2]+mmx_len), "r" (dst+mmx_len), "g" (-mmx_len)
    : "%"REG_a

libavcodec/x86/mathops.h COPY3_IF_LT():
    : "+&r" (x), "+&r" (a), "+r" (c)
    : "r" (y), "r" (b), "r" (d)

libavcodec/x86/vp56_arith.h vp56_rac_get_prob():
    : "+q"(bit), "+&r"(c->high), "+&r"(c->code_word)
    : "r"(low_shift), "r"(low), "r"(code_word)

libavcodec/x86/cavsdsp.c QPEL_CAVS():
    : "+a"(src), "+c"(dst), "+m"(h)
    : "d"((x86_reg)srcStride), "S"((x86_reg)dstStride), 
      "m"(ff_pw_5), "m"(ff_pw_4)
    : "memory"

libavcodec/x86/mpegaudiodsp.c apply_window():
    :"+&r"(count)
    :"r"(win1a), "r"(win2a), "r"(bufa), "r"(sum1a), "r"(sum2a)

libavcodec/x86/snowdsp.c snow_inner_add_yblock_sse2_header:
    :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)
    :"rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"(b_h),
     "m"(src_stride)
    :XMM_CLOBBERS("%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", 
                  "%xmm5", "%xmm6", "%xmm7", )
     "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d""

libavcodec/x86/mpegvideoenc_template.c dct_quantize:
    : "+a" (last_non_zero_p1)
    : "r" (block+64), "r" (qmat+64), "r" (bias+64),
      "r" (inv_zigzag_direct16 + 64), "r" (temp_block + 64)
      XMM_CLOBBERS_ONLY("%xmm0", "%xmm1", "%xmm2", "%xmm3",
                        "%xmm4", "%xmm5", "%xmm6", "%xmm7")

libavcodec/x86/vp3dsp_init.c put_vp_no_rnd_pixels8_l2_mmx():
    :"+r"(h), "+r"(a), "+r"(b), "+r"(dst)
    :"r"((x86_reg)stride), "r"((x86_reg)3L*stride)
    :"memory");

libavcodec/x86/vc1dsp_mmx.c vc1_put_ver_16b_shift2_mmx():
    : "+r"(src), "+r"(dst)
    : "r"(stride), "r"(-2*stride),
      "m"(shift), "m"(rnd), "r"(9*stride-4)
      NAMED_CONSTRAINTS_ADD(ff_pw_9)
    : "%"REG_c, "memory"

libswscale/x86/swscale_template.c yuv2bgr24_X_ar:
    :: "r" (&c->redDither),
       "m" (dummy), "m" (dummy), "m" (dummy),
       "r" (dest), "m" (dstW_reg), "m"(uv_off)
       NAMED_CONSTRAINTS_ADD(ff_M24A,ff_M24C,ff_M24B)
    : "%"REG_a, "%"REG_c, "%"REG_d, "%"REG_S

libswscale/x86/yuv2rgb_template.c yuv420_rgb15
    : "+r" (index), "+r" (image)
    : "r" (pu - index), "r" (pv - index), "r"(&c->redDither),
      "r" (py - 2*index)
      NAMED_CONSTRAINTS_ADD(mmx_00ffw,pb_03,pb_07,mmx_redmask,pb_e0)
      RGB_PACK24_B_OPERANDS
    : "memory"

Is one of them not using six registers?

Carl Eugen