[FFmpeg-devel] [RFC][PATCH 0/3] VC-1 HW Accel field interlaced decoding

[Gwenole Beauchesne]

Hi,

2012/8/19 Hendrik Leppkes <h.leppkes at gmail.com>:

> this patchset adds support for HW accel decoding of VC-1 field interlaced pictures.
> It is tested using the DXVA2 hwaccel implementation only, because i do not have a system setup for VA-API (the only other VC1 HW accel).

This patch series does not work with VA-API and I am even surprised it
works with DXVA.

> The first two patches are simple preparations and essentially usable stand-alone without any (known) issues.
>
> Patch 1 disables the full picture header parsing when using a hw accel, because it is not required.
> The HW accelerator will perform this parsing itself, and none of the values parsed from the bistream are passed to the HW accelerator. In addition, VC-1 interlaced parsing is known to not be completely tested, so disabling it in a code path where its not required avoids potential bugs.

The HW accelerator won't always parse the headers itself. Besides,
even for DXVA2, you need to correctly fill in wMBbitOffset. If you
stop the parsing earlier, get_bits_count() won't return the expected
value. So, wMBbitOffset will get wrong and some HW accelerators may
fail. Some other bits are also needed for DXVA2 like MV mode types,
etc.

Regards,
Gwenole