[FFmpeg-cvslog] lavc/riscv: vset macro for simplify if-else

[sunyuechi]

ffmpeg | branch: master | sunyuechi <sunyuechi at iscas.ac.cn> | Tue Dec 17 12:03:59 2024 +0800| [6b31e42c47c00817f6249f43391873a15b1c00a4] | committer: Nuo Mi

lavc/riscv: vset macro for simplify if-else

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=6b31e42c47c00817f6249f43391873a15b1c00a4
---

 libavcodec/riscv/h26x/asm.S | 78 +++++++++++----------------------------------
 1 file changed, 18 insertions(+), 60 deletions(-)

diff --git a/libavcodec/riscv/h26x/asm.S b/libavcodec/riscv/h26x/asm.S
index d37b459f66..d99690d9a0 100644
--- a/libavcodec/riscv/h26x/asm.S
+++ b/libavcodec/riscv/h26x/asm.S
@@ -20,88 +20,46 @@
 
 #include "libavutil/riscv/asm.S"
 
-.macro vsetvlstatic8 w, vlen
+.macro vsetvlstatic w, vlen, en, mn1, mn2, mn3, mn4, mn5, mn6
         .if \w == 2 && \vlen == 128
-                vsetivli        zero, \w, e8, mf8, ta, ma
+                vsetivli        zero, \w, \en, \mn1, ta, ma
         .elseif \w <= 4 && \vlen == 128
-                vsetivli        zero, \w, e8, mf4, ta, ma
+                vsetivli        zero, \w, \en, \mn2, ta, ma
         .elseif \w <= 8 && \vlen == 128
-                vsetivli        zero, \w, e8, mf2, ta, ma
+                vsetivli        zero, \w, \en, \mn3, ta, ma
         .elseif \w <= 16 && \vlen == 128
-                vsetivli        zero, \w, e8, m1, ta, ma
+                vsetivli        zero, \w, \en, \mn4, ta, ma
         .elseif \w <= 32 && \vlen == 128
                 li              t0, \w
-                vsetvli         zero, t0, e8, m2, ta, ma
+                vsetvli         zero, t0, \en, \mn5, ta, ma
         .elseif \w <= 4 && \vlen == 256
-                vsetivli        zero, \w, e8, mf8, ta, ma
+                vsetivli        zero, \w, \en, \mn1, ta, ma
         .elseif \w <= 8 && \vlen == 256
-                vsetivli        zero, \w, e8, mf4, ta, ma
+                vsetivli        zero, \w, \en, \mn2, ta, ma
         .elseif \w <= 16 && \vlen == 256
-                vsetivli        zero, \w, e8, mf2, ta, ma
+                vsetivli        zero, \w, \en, \mn3, ta, ma
         .elseif \w <= 32 && \vlen == 256
                 li              t0, \w
-                vsetvli         zero, t0, e8, m1, ta, ma
+                vsetvli         zero, t0, \en, \mn4, ta, ma
         .elseif \w <= 64 && \vlen == 256
                 li              t0, \w
-                vsetvli         zero, t0, e8, m2, ta, ma
+                vsetvli         zero, t0, \en, \mn5, ta, ma
         .else
                 li              t0, \w
-                vsetvli         zero, t0, e8, m4, ta, ma
+                vsetvli         zero, t0, \en, \mn6, ta, ma
         .endif
 .endm
 
+.macro vsetvlstatic8 w, vlen
+        vsetvlstatic \w, \vlen, e8, mf8, mf4, mf2, m1, m2, m4
+.endm
+
 .macro vsetvlstatic16 w, vlen
-        .if \w == 2 && \vlen == 128
-                vsetivli        zero, \w, e16, mf4, ta, ma
-        .elseif \w <= 4 && \vlen == 128
-                vsetivli        zero, \w, e16, mf2, ta, ma
-        .elseif \w <= 8 && \vlen == 128
-                vsetivli        zero, \w, e16, m1, ta, ma
-        .elseif \w <= 16 && \vlen == 128
-                vsetivli        zero, \w, e16, m2, ta, ma
-        .elseif \w <= 32 && \vlen == 128
-                li              t0, \w
-                vsetvli         zero, t0, e16, m4, ta, ma
-        .elseif \w <= 4 && \vlen == 256
-                vsetivli        zero, \w, e16, mf4, ta, ma
-        .elseif \w <= 8 && \vlen == 256
-                vsetivli        zero, \w, e16, mf2, ta, ma
-        .elseif \w <= 16 && \vlen == 256
-                vsetivli        zero, \w, e16, m1, ta, ma
-        .elseif \w <= 32 && \vlen == 256
-                li              t0, \w
-                vsetvli         zero, t0, e16, m2, ta, ma
-        .elseif \w <= 64 && \vlen == 256
-                li              t0, \w
-                vsetvli         zero, t0, e16, m4, ta, ma
-        .else
-                li              t0, \w
-                vsetvli         zero, t0, e16, m8, ta, ma
-        .endif
+        vsetvlstatic \w, \vlen, e16, mf4, mf2, m1, m2, m4, m8
 .endm
 
 .macro vsetvlstatic32 w, vlen
-        .if \w == 2
-                vsetivli        zero, \w, e32, mf2, ta, ma
-        .elseif \w <= 4 && \vlen == 128
-                vsetivli        zero, \w, e32, m1, ta, ma
-        .elseif \w <= 8 && \vlen == 128
-                vsetivli        zero, \w, e32, m2, ta, ma
-        .elseif \w <= 16 && \vlen == 128
-                vsetivli        zero, \w, e32, m4, ta, ma
-        .elseif \w <= 4 && \vlen == 256
-                vsetivli        zero, \w, e32, mf2, ta, ma
-        .elseif \w <= 8 && \vlen == 256
-                vsetivli        zero, \w, e32, m1, ta, ma
-        .elseif \w <= 16 && \vlen == 256
-                vsetivli        zero, \w, e32, m2, ta, ma
-        .elseif \w <= 32 && \vlen == 256
-                li              t0, \w
-                vsetvli         zero, t0, e32, m4, ta, ma
-        .else
-                li              t0, \w
-                vsetvli         zero, t0, e32, m8, ta, ma
-        .endif
+        vsetvlstatic \w, \vlen, e32, mf2, m1, m2, m4, m8, m8
 .endm
 
 .macro POW2_JMP_TABLE id, vlen