[FFmpeg-cvslog] lavc/idctdsp: improve R-V V add_pixels_clamped

Rémi Denis-Courmont git at videolan.org
Mon Oct 30 22:24:11 EET 2023


ffmpeg | branch: master | Rémi Denis-Courmont <remi at remlab.net> | Fri Oct 27 22:12:53 2023 +0300| [d48810f3a58b4bf611ea4a75275334d30337e786] | committer: Rémi Denis-Courmont

lavc/idctdsp: improve R-V V add_pixels_clamped

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=d48810f3a58b4bf611ea4a75275334d30337e786
---

 libavcodec/riscv/idctdsp_rvv.S | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/libavcodec/riscv/idctdsp_rvv.S b/libavcodec/riscv/idctdsp_rvv.S
index 4ff72f48d2..fafdddb174 100644
--- a/libavcodec/riscv/idctdsp_rvv.S
+++ b/libavcodec/riscv/idctdsp_rvv.S
@@ -23,7 +23,6 @@
 func ff_put_pixels_clamped_rvv, zve32x
         vsetivli    zero, 8, e16, m1, ta, ma
         vlseg8e16.v v24, (a0)
-1:
         /* RVV only has signed-signed and unsigned-unsigned clipping.
          * We need two steps for signed-to-unsigned clipping. */
         vsetvli     t0, zero, e16, m8, ta, ma
@@ -54,17 +53,18 @@ func ff_put_signed_pixels_clamped_rvv, zve64x
         ret
 endfunc
 
-func ff_add_pixels_clamped_rvv, zve32x
-        vsetivli    zero, 8, e8, mf2, ta, ma
-        vlseg8e16.v v24, (a0)
-        vlsseg8e8.v v16, (a1), a2
-        vwaddu.wv   v24, v24, v16
-        vwaddu.wv   v25, v25, v17
-        vwaddu.wv   v26, v26, v18
-        vwaddu.wv   v27, v27, v19
-        vwaddu.wv   v28, v28, v20
-        vwaddu.wv   v29, v29, v21
-        vwaddu.wv   v30, v30, v22
-        vwaddu.wv   v31, v31, v23
-        j           1b
+func ff_add_pixels_clamped_rvv, zve64x
+        vsetivli zero, 8, e8, mf2, ta, ma
+        li      t0, 8 * 8
+        vlse64.v v16, (a1), a2
+        vsetvli zero, t0, e8, m4, ta, ma
+        vle16.v v24, (a0)
+        vwaddu.wv v24, v24, v16
+        vsetvli zero, zero, e16, m8, ta, ma
+        vmax.vx v24, v24, zero
+        vsetvli zero, zero, e8, m4, ta, ma
+        vnclipu.wi v16, v24, 0
+        vsetivli zero, 8, e8, mf2, ta, ma
+        vsse64.v v16, (a1), a2
+        ret
 endfunc



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