[FFmpeg-cvslog] lavc/alacdsp: RISC-V V append_extra_bits[0]

[Rémi Denis-Courmont]

ffmpeg | branch: master | Rémi Denis-Courmont <remi at remlab.net> | Tue Oct  4 20:17:17 2022 +0300| [55bde97f29cb41c8bce30f4a6e72d18b05289184] | committer: Lynne

lavc/alacdsp: RISC-V V append_extra_bits[0]

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=55bde97f29cb41c8bce30f4a6e72d18b05289184
---

 libavcodec/riscv/alacdsp_init.c |  8 +++++++-
 libavcodec/riscv/alacdsp_rvv.S  | 18 ++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/libavcodec/riscv/alacdsp_init.c b/libavcodec/riscv/alacdsp_init.c
index 9ddebaa60b..37688be67b 100644
--- a/libavcodec/riscv/alacdsp_init.c
+++ b/libavcodec/riscv/alacdsp_init.c
@@ -27,13 +27,19 @@
 
 void ff_alac_decorrelate_stereo_rvv(int32_t *buffer[2], int nb_samples,
                                     int decorr_shift, int decorr_left_weight);
+void ff_alac_append_extra_bits_mono_rvv(int32_t *buffer[2],
+                                        int32_t *extra_bits_buf[2],
+                                        int extra_bits, int channels,
+                                        int nb_samples);
 
 av_cold void ff_alacdsp_init_riscv(ALACDSPContext *c)
 {
 #if HAVE_RVV && (__riscv_xlen == 64)
     int flags = av_get_cpu_flags();
 
-    if (flags & AV_CPU_FLAG_RVV_I32)
+    if (flags & AV_CPU_FLAG_RVV_I32) {
         c->decorrelate_stereo = ff_alac_decorrelate_stereo_rvv;
+        c->append_extra_bits[0] = ff_alac_append_extra_bits_mono_rvv;
+    }
 #endif
 }
diff --git a/libavcodec/riscv/alacdsp_rvv.S b/libavcodec/riscv/alacdsp_rvv.S
index 5d75d6f2f9..7478ab228b 100644
--- a/libavcodec/riscv/alacdsp_rvv.S
+++ b/libavcodec/riscv/alacdsp_rvv.S
@@ -43,4 +43,22 @@ func ff_alac_decorrelate_stereo_rvv, zve32x
 
         ret
 endfunc
+
+func ff_alac_append_extra_bits_mono_rvv, zve32x
+        ld      a0, (a0)
+        ld      a1, (a1)
+1:
+        vsetvli t0, a4, e32, m1, ta, ma
+        vle32.v v16, (a0)
+        sub     a4, a4, t0
+        vle32.v v24, (a1)
+        sh2add  a1, t0, a1
+        vsll.vx v16, v16, a2
+        vor.vv  v16, v24, v16
+        vse32.v v16, (a0)
+        sh2add  a0, t0, a0
+        bnez    a4, 1b
+
+        ret
+endfunc
 #endif