[FFmpeg-cvslog] libavutils: Add parse_r helper for MIPS

Jiaxun Yang git at videolan.org
Thu Jul 23 18:23:20 EEST 2020


ffmpeg | branch: master | Jiaxun Yang <jiaxun.yang at flygoat.com> | Sat Jul 18 23:35:38 2020 +0800| [d5380f068d8c28ab3d2ffcea445a2a8072c30503] | committer: Michael Niedermayer

libavutils: Add parse_r helper for MIPS

That helper grab from kernel code can allow us to inline
newer instructions (not implemented by the assembler) in
a elegant manner.

Signed-off-by: Jiaxun Yang <jiaxun.yang at flygoat.com>
Reviewed-by: Shiyou Yin <yinshiyou-hf at loongson.cn>
Signed-off-by: Michael Niedermayer <michael at niedermayer.cc>

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=d5380f068d8c28ab3d2ffcea445a2a8072c30503
---

 libavutil/mips/asmdefs.h | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/libavutil/mips/asmdefs.h b/libavutil/mips/asmdefs.h
index 748119918a..76bb2b93fa 100644
--- a/libavutil/mips/asmdefs.h
+++ b/libavutil/mips/asmdefs.h
@@ -55,4 +55,46 @@
 # define PTR_SLL        "sll "
 #endif
 
+/*
+ * parse_r var, r - Helper assembler macro for parsing register names.
+ *
+ * This converts the register name in $n form provided in \r to the
+ * corresponding register number, which is assigned to the variable \var. It is
+ * needed to allow explicit encoding of instructions in inline assembly where
+ * registers are chosen by the compiler in $n form, allowing us to avoid using
+ * fixed register numbers.
+ *
+ * It also allows newer instructions (not implemented by the assembler) to be
+ * transparently implemented using assembler macros, instead of needing separate
+ * cases depending on toolchain support.
+ *
+ * Simple usage example:
+ * __asm__ __volatile__("parse_r __rt, %0\n\t"
+ *                      ".insn\n\t"
+ *                      "# di    %0\n\t"
+ *                      ".word   (0x41606000 | (__rt << 16))"
+ *                      : "=r" (status);
+ */
+
+/* Match an individual register number and assign to \var */
+#define _IFC_REG(n)                                \
+        ".ifc        \\r, $" #n "\n\t"             \
+        "\\var        = " #n "\n\t"                \
+        ".endif\n\t"
+
+__asm__(".macro        parse_r var r\n\t"
+        "\\var        = -1\n\t"
+        _IFC_REG(0)  _IFC_REG(1)  _IFC_REG(2)  _IFC_REG(3)
+        _IFC_REG(4)  _IFC_REG(5)  _IFC_REG(6)  _IFC_REG(7)
+        _IFC_REG(8)  _IFC_REG(9)  _IFC_REG(10) _IFC_REG(11)
+        _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15)
+        _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19)
+        _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23)
+        _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27)
+        _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31)
+        ".iflt        \\var\n\t"
+        ".error        \"Unable to parse register name \\r\"\n\t"
+        ".endif\n\t"
+        ".endm");
+
 #endif /* AVCODEC_MIPS_ASMDEFS_H */



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